ALCCS - NEW
SCHEME
Code: CT12 Subject: COMPUTER ARCHITECTURE
Time: 3 Hours
Max. Marks: 100
NOTE:
· Question 1 is compulsory and
carries 28 marks. Answer any FOUR questions from the rest. Marks are indicated against each question.
· Parts of a question should be
answered at the same place.
Q.1 (7
4)
a. What are the advantages of a RISC
processor?
b. Give the truth table for Y =
Σ (m0, m3, m6, m9, m12,
m15) + Σd (m5) and give its expression in maxterm
form (Product of sum).
c. Explain error
correcting & error detecting codes.
d. What do you
understand by BCD code? Represent 163 in binary code and in BCD form.
e. Explain briefly
DMA based transfer.
f. What
is segment addressing?
g. What is the need for a cache memory? Where is it
located in a computer?
Q.2 a. Discuss the concept of virtual memory and
its mapping techniques.
b.
A task can be carried out with a six stage pipeline with clock cycle of 10ns.The
same task can be done in a non pipeline unit in 50ns. Determine
the speed up ratio of the pipeline for 100 tasks. What is the maximum speed up
that can be achieved? Determine the number of clock cycles it takes to process
200 tasks? (10+8)
Q.3 a. A
program repeatedly execute a loop that has 120 iterations. Each iteration takes
10,000 cycles. On a multiprocessor system 50,000 additional cycles are enquired
to synchronise the processor once all iterations of the loop have completed.
(i) What
is the execution time of each loop on a uniprocesser system?
(ii) What is the execution time
of each loop on a 2- processer system and the speed up over the uniprocesser system?
(iii) What is the execution
time of each loop on a 4- processer system and the speed up over uniprocesser
system?
b. Discuss cache coherence and its hardware and software oriented
solution in a shared memory system. (8+10)
Q.4 a. Discuss different types of serial & parallel data
communications used in computer systems.
b. Explain the following terms:-
(i)
Transparent mode DMA operation.
(ii) Interrupt service routine. (10+8)
Q.5 a.
Use booth multiplication algorithm to multiply 15 with 9. Show all the steps.
b. Explain the following terms:-
(i) Memory interleaving.
(ii) Semi conductor static memory cell. (10+8)
Q.6 a. Explain with the help of a diagram the
functioning of a microprogram sequence for a control memory.
b. What is
the need for page replacement policy in memory management system? Briefly
describe 3 page replacement policies. (10+8)
Q.7 a. State the RTLs for fetch and decode cycle.
Give the common bus architecture to implement above RTLs.
b. Present
the hardware realization of a BCD subtractor.
(10+8)