ABOUT THE INSTITUTION

INTRODUCTION

The Institution of Electronics and Telecommunication Engineers (IETE), formerly the Institution of Telecommunication Engineers (ITE) was founded in 1953 by a small group of professionals for the advancement of Telecommunication and Electronics in India. Today the Institution has grown in its status to international levels with its manifold activities for furthering the cause of development in the key sectors of national economy namely Electronics, Telecommunications, Computer Science & Engineering, Information Technology and allied disciplines. The emphasis of the current activities is on creation of a concrete base of trained manpower in these fields at various levels of competence and also to contribute gainfully towards the continued professional development needs of existing technical personnel. The IETE also provides a platform for meaningful interaction among professionals from the Industry, R&D Organisations, Educational Institutions and Government Departments.

Membership

1. The IETE is a professional society devoted to the advancement of Electronics and Telecommunication, Computers and Information Technology. The Institution is headed by a Council, elected from its large base of corporate members in India and abroad. It confers professional status by way of admitting such persons, as may be qualified to various classes of membership such as Honorary Fellow, Distinguished Fellow, Fellow, Member, Associate Member, Diploma Member, Associate and Student Member. Organizational Membership is also open to Public/Private Sector Companies, Institutions, R&D Laboratories and Government Organisations.

Objectives

2. The IETE focuses on advancing the science and technology of electronics, telecommunications, computers, information technology and related areas. The objectives of the Institution, inter-alias include;

· Organise conferences, symposia, workshops and brainstorming sessions involving all concerned professionals, students and industry associations for the advancement of the Disciplines.

· Provide a forum for discussion on national policies and to provide suitable inputs to policy makers.

· Promote and conduct basic engineering and continuing technical education programmes for human resource development.

· Stimulate research and development in the Discipline.

· Bring out quality publications for all levels of readership.

· Honour outstanding professionals.

Examinations

3. The IETE conducts the AMIETE (Graduateship) Examination, in order that a student qualifies and becomes an Associate Member. The AMIETE examination is recognized by Government of India for the purposes of recruitment to superior posts and services under the Central Government. A similar recognition has been given by UPSC & several State Governments. A large number of Universities and Institution have recognized AMIETE for admission to postgraduate courses. Extract/Detail of recognition from Govt of India/State Governments/ Universities/Institutions are appended at Annexure I and Annexure II.

4. This qualification further enables a candidate to appear for GATE for postgraduate studies in India. AMIETE (ET) standard in a particular case has been evaluated by the World Education Service, a New York based Educational Credential Evaluators, who have declared that it is equivalent to a Bachelors Degree in Electronics and Telecommunication Engineering. The IETE also conducts ALCCS course (Advanced Level Course in Computer Science) which is also recognised by the Ministry of HRD, Government of India, for the purpose of appointment to superior posts and services under the Central Government, where M. Tech in Computer Science is a prescribed qualification for recruitment.

Facilities for Students

5. The IETE helps the students by extending library facilities, laboratory assistance, and coordination of IETE Students Forums and by providing necessary guidance at its Local Centres. To spread its many fold technical activities in all the regions of the country, IETE has established so far 52 Centres spread all over the country including a centre abroad at Kathmandu and Examination Centre at Abu Dhabi. IETE also has mutual arrangements with similar professional bodies like the Institution of Engineers (India), CSI, IEEE (USA), IEEE Com Soc and IET (UK) for availing each other’s facilities for the benefit of its members.

ASSISTANCE IN PLACEMENT

6. IETE makes effort to assist in the placement of students with the help of a placement cell established at IETE HQ, New Delhi.

Recognition

7. The IETE is recognised by the Government of India as an EDUCATIONAL INSTITUTION OF NATIONAL EMINENCE. The IETE has also been recognised by the Government of India, Ministry of Science and Technology, Dept. of Scientific and Industrial Research as a SCIENTIFIC AND INDUSTRIAL RESEARCH ORGANISATION (SIRO). Copy of recognition letter is appended at Annexure III.

AMIETE EXAMINATION

Regulations & Syllabi

INTRODUCTION

8. IETE conducts AMIETE Examination in the following three streams: -

(a) Electronics & Telecommunication Engineering (ET)

(b) Computer Science & Engineering (CS)

(c) Information Technology (IT)

9. The course curriculum and outline syllabi of these streams are given in this booklet. In addition, detailed syllabi of the Electronics and Telecommunication stream is appended at Appendix ’G’

Eligibility

10. A candidate desirous of taking up the AMIETE Examination should first be enrolled either as a Dip IETE as per Bye law 15, or as Student (SG) as per Bye law 16, which are reproduced below:

Bye law 15-Student (DipIETE )Member

Every candidate for election to the class of Diploma member shall be not less than 18 years of age and shall satisfy the Council that he has passed the Diploma Examination of the Institution (DIPIETE) as per the examination regulations prescribed by the Council from time to time or has passed any other Examination, which in the opinion of the Council, is equivalent to or warrants exemption from the Diploma Examination of the Institution.

Bye law 16-Student (AM) Member

Every candidate for election to the class of Student (AM) shall satisfy the Council that he/she is not less than 16 years of age and has passed the 12^th standard examination of 10+2 system, conducted by a recognised Board of Education with physics and mathematics, or its equivalent as prescribed by the Council from time to time; and

(a) is sponsored by a Corporate Member of the Institution; and either

(b) that he/she is or has been a student of electronics engineering/ telecommunication engineering/ electrical engineering /computers/information technology/ physics in a university/college/ institution approved by the Council.

(c) that he/she is or has been an engineering pupil/apprentice/assistant in a recognized firm, society or organization engaged in engineering or allied activities.

ENROLMENT

11. A candidate is required to apply for enrolment on the prescribed form (Form IETE-2), which is contained in this booklet. The form also includes the conditions for eligibility.

12. Every application form for student member must be attached with the copies of certificates (age, educational/experience) duly attested by a Corporate member/Gazetted Officer, failing which the application shall not be entertained. For this purpose, the candidate may contact the office of the local/sub-centres of IETE. In case of any difficulty in getting the form proposed, the form may be submitted directly to the IETE HQ for further action.

Enrolment Fee

13. Fees to be paid for enrolment are as given in Form IETE-2 contained in this syllabus. The enrolment fees payable by student members are as under: -

Member in India Member Abroad

(Rs) (US $)

(a) Application Fee 150.00 30.00

(b) Admission Fee 150.00 30.00

(d) Composite Subscription 1400.00 280.00

(e) Lab Infrastructure Fee 400.00 80.00

(f) Development Fee 400.00 80.00

3800.00 760.00

14. Enrolment fee is to be paid in one installment at the time of enrolment. The student membership will be valid for 10 consecutive examinations from the date of enrolment. Thereafter, the student members not completing their AMIETE Examination are to seek re-enrolment for further 10 examinations by remitting applicable amount before or immediately after the expiry their membership period to enable them to appear in the remaining papers and complete AMIETE. Any examination chance not availed by a student due to whatsoever reason will be counted within 10 examinations.

MINIMUM PERIOD OF MEMBERSHIP

15. A Student member shall be allowed to appear in the AMIETE Examination only after he/she has enrolled as a Student member with the Institution. Only those Student members who get enrolled on or before 28/29^th February and 31^st August will be allowed to appear in the next AMIETE Examination, held in June and December respectively. Membership should be alive at the time of submitting the examination application form.

TIME LIMIT TO COMPLETE AMIETE

16. A student is required to complete AMIETE Examination within two enrolment periods of 10 consecutive examinations each from the date of initial enrolment. The student will, therefore, be permitted to seek only one renewal of membership. Renewal is to be applied for before or immediately after the expiry of initial enrolment with continuity of enrolment maintained by the student. Any delayed re-enrolment entailing missed chances will be counted towards total number of examinations and no relaxation in this regard will be permissible. If the request for renewal is made after the stipulated period of two enrolments, admission will be treated as a fresh enrolment and no benefit in terms of exemptions in respect of subject(s) passed or exempted during the earlier enrolment will be granted. Students must renew their membership in time. Otherwise they will not be allowed to appear in the AMIETE examination. No notice will be sent to the students for renewal of membership.

17. The course curriculum and outline Syllabi for all the streams are given as follows: -

(a) Course Curriculum (ET) (Appendix-A)

(b) Outline Syllabus (ET) (Appendix-B)

(c) Course Curriculum (CS) (Appendix-C)

(d) Outline Syllabus (CS) (Appendix-D)

(e) Course Curriculum (IT) (Appendix-E)

(f) Outline Syllabus (IT) (Appendix-F)

The detailed syllabus of Electronics and Telecommunication stream is appended at Appendix ‘G ’.

AMIETE EXAMINATION

18. AMIETE examination is divided in two Sections viz Section A and Section B with a total of 20 theory papers (11 in Section A and 9 in Section B) and 4 Labs (2 Labs in Section A and 2 Labs in Section B). Each Section is divided in two parts viz. Part-I and Part-II. In addition a student has to undergo a project work, seminar and a Course in Communication Skills & Technical Writing. The course on Communication Skills & Technical Writing is mandatory but would not count towards overall CGPA.

19. Distribution of subjects is as under:

(a) SECTION A

(i) PART-I Five subjects & 1 Lab

(ii) PART-II Six subjects & 1 Lab

(b) SECTION B

(i) PART-I Five subjects & 1 Lab

(ii) PART-II Four subjects & 1 Lab

(Two compulsory & two from Elective Subjects)

(d) SEMINAR

(e) Course in Communication Skills & Technical Writing

(Any time during the course)

20. The student should appear in Section A Part-I first and then in Part-II. If a student appears in a part in first attempt, he can appear in the subsequent part in next attempt even though he/she may not have passed in the subjects of the previous part.

21. Notwithstanding above, a student will not be allowed to complete the curriculum in less than four years unless he has been exempted in some subjects.

LAB EXAMINATION

22. Eligibility for Lab Examination :

(a) To become eligible for lab examination in Section A Part-I, a student should have appeared for all the subjects in Section A Part-I and should have passed atleast 3 of the subjects in Section A Part-I.

(b) To become eligible for lab examination in Section A Part-II, a student should have appeared for all the subjects in Section A Part-II. In addition, the student should have passed atleast 3 subjects in Section A Part-II and the lab examination in Section A Part-I.

(c) To become eligible for Lab examination in Section B Part-I, a student should have appeared for all the subjects in Section B Part-I. In addition, the student should have passed atleast 6 subject in Section A, 3 subjects in Section B Part-I and both Lab Examinations in Section A with a GPA of 5 or more. GPA will be inclusive of theory and Lab Examinations.

(d) To become eligible for lab examination in Section B Part-II, a student should have appeared for all the subjects in Section B. In addition, the student should have passed atleast 6 subject in Section A, 6 subjects in Section B, both Lab examinations in Section A and the lab examination in Section B Part I.

PROJECT WORK

23. To become eligible for Project, a student should have cleared 16 subjects including Labs of Section A & B with GPA of 5 or more. In addition a student should have completed three and half year from the date of enrolment.

SEMINAR

24. To become eligible for Seminar, a student should have cleared 16 subjects including Labs of Section A and Section B with GPA of 5 or more. In addition a student should have completed three and half year from the date of enrolment.

COMMUNICATION SKILL & TECHNICAL WRITING

25. The course on Communication Skills & Technical Writing is compulsory for all students. However, the course does not contribute to the overall CGPA. A minimum of 50% marks individually in theory and oral test has to be obtained by the student at any time before the completion of his/her AMIETE. This course consists of theory and oral test. Accordingly, “PASS” or “FAIL” will be reflected in the Grade Sheet.

(a) Theory : This consists of written examination for 70 marks.

(b) Oral Test : Consists of an Oral Test to test the Communication Skills which include an oral presentation on any subject of the choice of students (e.g. About IETE, general knowledge topics etc). This presentation need not be on technical subject. This test carries 30 marks.

EXEMPTIONS

26. Exemption may be granted in various paper(s) to the students who have passed similar subjects from elsewhere or other courses. Such exemptions are granted to a candidate passing the subject and successfully completing the course/curriculum from recognized Institution /Colleges/Universities and approved by the IETE Council.

Candidates seeking exemption are required to submit the following documents along with requisite fee:

(a) Application form for exemption.

(b) Certificate of the course/curriculum completed by the student.

(d) Certified copy of syllabi from which the candidate has passed the course.

(e) Fee @ Rs.400/- per subject for which exemption is sought.

Candidates are advised to apply for exemption, if required, at the earliest opportunity. All cases of exemptions are considered by the Academic Committee of the Institution. For all subjects where exemption are granted will be communicated to the students in the Mark sheet of the first examination after the exemption is sought as it generally takes two month to process an application for exemption. Exemption will generally be granted if the major portion of the syllabi matches with IETE Syllabus. THE DECISION OF THE ACADEMIC COMMITTEE WILL BE FINAL AND BINDING TO ALL CONCERNED. NO REPRESENTATION IN THIS RESPECT WILL BE ENTERTAINED.

AWARD OF AMIETE

27. Every Student member successfully completing Sections A and Section B subjects including lab examinations with project work, seminar and a course in Communication Skills & Technical Writing of AMIETE Examination as per regulations prescribed by the Council from time to time shall be eligible to become a Associate Member (AMIETE). On payment of requisite fee for membership, he/she will be awarded a certificate of having passed the AMIETE examination of the Institution and shall then be eligible for transfer to the class of AMIETE. To pass AMIETE Examination, a student is required to score a minimum grade of ‘D’ having a grade point of 4 for each subject and having an aggregate of 5 CGPA. However for Project, Seminar and lab examination he/she should get a minimum grade of C having a grade point of 5.

CGPA SYSTEM

28. CGPA System which is followed by IETE is given below :

(a) Subject wise grade and grade points are as given below:-

Grade Grade Point

A+ 10

A 9

B+ 8

B 7

C+ 6

C 5

D 4

(b) CGPA will be calculated as under only for the subjects where a student has passed :-

CGPA = C₁ G₁+ C₂ G₂ ------ + C_u G_u

C₁+C₂+C₃ ------ C_n

where G₁ G₂------denote the grade point scored.

C₁ C_{2_}------denote the credits of subjects.

All theory Subjects & Lab Carry 4 Credits.

Project work Carries 8 Credits.

Seminar Carries 4 Credits.

(i) CGPA of 9 or more - Distinction

(ii) CGPA 6.5 or more but less than 9 - First Division

(iii) CGPA 5 or more but less than 6.5 - Second Division

(iv) Less than 5 - FAIL (No award will be given)

EXAMINATION APPLICATION

29. Applications to appear in any of the subjects of the AMIETE Examination must be made on the prescribed OMR Examination Form and accompanied by the requisite examination fee. The prescribed application form is given initially free of cost along with prospectus and later on with gradesheet where a student has appeared for an examination. OMR Examination application form can also be obtained by the students by payment of Rs. 20/- from any IETE Centre or HQ IETE. No action will be taken on an incomplete application. Students are advised to ensure that they have filled all the columns and have enclosed relevant documents. For exemption separate form is to be used. Generally, after the acceptance of examination form of the students, change of examination centre is not encouraged. However in exceptional cases, change of exam Centre will be allowed with an additional charge of Rs. 200/-. For any correction in the examination form after processing and additional amount of Rs 200/- will be charged as reprocessing fee.

Note : Change of streams will be allowed with an additional charge of Rs. 600/-.

EXAMINATION FEE

30. Students are to submit their Examination Application form along with the fee as given below. The fee may get revised from time to time and the students are required to submit their application form along with the latest fee structure in force. The present fee structure is given below:

In India Abroad Remarks

(Rs) (US $)

(a) Theory papers/per subject 400.00 80.00 To be deposited along

(b) Exemption/per subject 400.00 80.00 with exam application form

& Technical Writing

(d) Project 1300.00 260.00

(e) Each Lab Examination 400.00 80.00 To be deposited at

(f) Oral Test on 400.00 80.00 respective IETE Centre

Communication Skills & Technical Writing

(g) Seminar 400.00 80.00

Note: (a) Fees will be charged per subject irrespective of whether it is for improvement OR re-appearance OR remaining paper OR additional paper OR exemption.

(b) Examination/Exemption fees once paid are neither refundable nor transferable to a subsequent examination.

(c) Enrolment Form, Examination Form and Exemption Form are to be sent separately with requisite fee along with each form.

LAST DATE FOR RECEIPT OF EXAMINATION APPLICATION

31. The last dates for receipt of Examination Applications duly filled in at the IETE HQ office for June and December examinations are 25^th April & 25^th October respectively. After these dates, Examination Applications will be considered up to 10 days from the last date i.e. up to 05^th May & 05^th November for June & December examination respectively with a late fee of Rs. 500/-. Any application received beyond these dates will be rejected, irrespective of date of bank draft for the fee.

DATE SHEET

32. The examinations are held twice a year from 15^th June and 15^th December and are conducted on all days including holidays and Sundays. The sequence of the papers of ET streams is given at appendix ‘H’. These dates are firm and changes if any, will be notified to students along with admit cards and through our website www.iete.org/www.iete.info and at the Local centre.

ADMIT CARD

33. Admit Cards will be sent to all the students to reach them by about 05^th of June/December. Admit Cards of eligible students will also be available on our Websites www.iete.org/www.iete.info and can be downloaded. Students will be allowed to appear for examination with these downloaded admit card along with their identity card. In the case of non-receipt of Admit-Card by above dates or the admit card not available on the website, the student must approach the concerned Examination Centre or IETE HQ and obtain permission to appear in the examination. No complaint in respect of non-receipt of Admit Card will be entertained once the Examination is over. A student is required to carry his IETE Identity Card and Admit Card issued by IETE for appearing in examination.

EXAMINATION CENTRES

34. At present the Examination are conducted at the following Centres : -

(a) In India:

Code	Centre	Code	Centre	Code	Centre
01	AHMEDABAD	15	VIJAYAWADA	36	BHOPAL
02	BANGALORE	16	TRIVANDRUM	37	NAGPUR
03	MUMBAI	23	JABALPUR	38	NOIDA
04	KOLKATA	24	ALIGARH	39	NASHIK
05	CHANDIGARH	25	ALLAHABAD	40	MHOW
06	DELHI	26	DEHRADUN	41	PALAKKAD
07	GUWAHATI	27	BHUBANESWAR	42	VADODARA
08	HYDERABAD	28	MANKAPUR	43	AURANGABAD
09	JAIPUR	30	PILANI	44	RAJKOT
10	KANPUR	31	IMPHAL	45	SHIMLA
11	LUCKNOW	32	KOCHI	46	PATNA
12	CHENNAI	33	MYSORE	47	COIMBATORE
13	VARANASI	34	VISAKHAPATNAM	48	RANCHI
14	PUNE	35	JAMMU

(b) Abroad:

Code	Centre
17	Abu Dhabi
19	Kathmandu

USE OF UNFAIR MEANS

35. If a student is found to have resorted to or made attempt to use Unfair Means, the Council/Board of Examination may on receipt of report to that effect either from the Exam Superintendent or from invigilator or from the Evaluator/expert take such action in respect of the student concerned as it thinks fit. The Examination Superintendent of the examination has absolute powers to expel the candidate from the examination hall, if in his opinion the student has adopted unfair means. The disciplinary action against the candidate may consist of punishment(s) extending from cancellation of the paper(s) to debarring from future examinations.

RESULTS

36. Results of the examinations will be announced on or before 25^th March and 25^th September for December & June examinations respectively and communicated to the candidates through Result Sheets separately. Results will be available on IETE Websites (www.iete.org/www.iete.info/www.elan).

RECOUNTING

37. It may be noted that there is no provision of re-evaluation of answer books. Therefore request for re-evaluation are outrightly rejected.

38. Recounting of scores, if requested, can be done by paying Rs.200/- (US$40) per subject. Requests for recounting of scores must be received at IETE HQ within 30 days from the date of announcement of results on a separate application.

IMPROVEMENT OF GRADES

39. A student who has passed in a subject may appear for improvement. He may take any number of chances irrespective of Grades previously obtained. If the student secures lower Grade than already secured, the original grade will hold good. Fee for improvement is Rs 400/- (US$40) per paper. However, no improvement is permitted in AMIETE Lab examination and project work. Improvement is also allowed after completion of the examinations. After completion, students are required to give an Undertaking that they want/do not want to appear in any subject for improvement. Provisional Certificate/Certificate/final Grade Sheet will be issued only after receipt of undertaking that no improvements are required and the fee towards Associate Membership is paid.

AWARDS FOR ACADEMIC EXCELLENCE

40. Seven awards have been instituted to give incentive to student members for high level of performance in the AMIETE Examinations. Details of awards are listed at Appendix ‘I’.

LEGAL MATTERS

41. Adjudication in respect of legal cases concerning IETE HQ will be as per Bye-law 95 of the Institution which is reproduced below: -

“All Legal cases concerning IETE HQ shall lie within the jurisdiction of Delhi courts only”

AFFILIATION/ACCREDITATION

42. The Institution of Electronics & Telecommunication Engineers (IETE) neither recognises nor accepts affiliations of any private coaching Institute. Students in the past have reported that some private institution claim that they run classes/coaching on behalf of IETE. It is reiterated that IETE does not authorise any private institution to run classes on behalf of IETE. Therefore IETE is not responsible for such Private Coaching Institutes.

Correspondence with IETE HQ

43. Important announcements concerning students and examinations will be available on the website and are also published in IETE Journal of Education which is issued quarterly (January-April, May-August and September-December) to the AMIETE Student members who have paid their subscriptions to date. For other facilities like participation in technical lectures, symposia etc. nearest Local/Sub-Centre (Address given in Annexure IV) may be contacted. All correspondence must be addressed to the Secretary General of the Institution (by designation and not by name). Remittances shall be made by way of crossed Bank Draft and/or multicity at par cheques. Facilities for making payments on-line will also be available shortly. Bank drafts/cheques should preferably be drawn on INDIAN OVERSEAS Bank/AXIS Bank/ ICICI Bank in favour of Secretary General IETE, New Delhi’. MONEY ORDER/IPO OR CASH WILL NOT BE ACCEPTED. All subscriptions/examination fees etc. should be paid to the Institution directly and not through a Local Centre of IETE or any other agency.

CHANGE OF ADDRESS

44. Students are advised to intimate their change of address to IETE HQ immediately, quoting their Membership Number, complete address with Pin Code.

45. Students are advised to provide their e-mail ID, telephone no and mobile no with their latest address in all correspondence.

Note: No entrance test is conducted for admission in AMIETE and DIPIETE courses. Even the local center is not authorized to conduct any entrance test for the admission in these courses. In case of any violation of this process, intimation can be given directly to the HQ.

Appendix –A

Course Curriculum for AMIETE (ET)

Appendix ‘B’

OUTLINE SYLLABUS

AMIETE (ELECTRONICS & TELECOMMUNICATION ENGINEERING)

Appendix-G

AMIETE(ET)

DETAILED SYLLABUS

Introduction

Most of the Student Members of the IETE are working engineers/ technicians/science graduates or under graduates. Thus, due to occupational reasons and other factors these students are deprived of a formal education and therefore have to learn the subjects through self-study only.

Review of Syllabus

2. IETE periodically reviews the syllabi of AMIETE and the aim of these reviews is not only to renovate and modernize the contents but also to make them contemporary. The syllabi for both Electronics & Telecommunications (ET),Computer Science & Engineering (CS) and Information Technology (IT) streams have been reviewed recently.

3. Keeping the above aspects in view and based on feed backs/suggestions received from the students, this syllabus has been formulated to meet the following criteria:-

· The Syllabus should cater to the technological advancements.

· The textbooks should be available and affordable to the students.

· In the absence of a formal coaching to the students, there should be a reasonable correlation between the topics in a subject and the text books.

Salient Features

4. Some salient features of the syllabus are:-

· Each subject has a code preceding it (viz AE51, AC51 and AT51 are codes for Mathematics-I in ET, CS and IT streams respectively).

· In order to guide the student and to enable him/her to prepare well for an examination, each subject is divided into 8 units and each unit has the course contents to be covered in 7 or 8 hours.

· The text books have been numbered in Roman Numerical (viz I, II, III)

· The chapters and sections are mentioned inside the bracket e.g. I (2.1) would indicates chapter 2 and section 1 of text book-I.

Scheme of the Examination

5. For all theory subjects the Question Paper contains

· 10 objective questions for 20 marks covering the complete syllabus

· 8 questions are from each unit and each question carries 16 marks.

6. Regular feed back from the students, academicians, corporate members and professionals is requested to keep this syllabus updated, so that our students keep abreast of latest technological changes. Though every effort has been made to identify standard and best text books for each subject, we welcome suggestions on availability of better and cheaper text books.

AE51 ENGINEERING MATHEMATICS – I

UNIT I

PARTIAL DIFFERENTIATION AND ITS APPLICATION 08 hrs

Introduction to function of two or more variables; Partial derivatives; Homogeneous functions – Euler’s theorem; Total derivatives; Differentiation of Implicit functions; change of variables; Jacobians; properties of Jacobians; Taylor’s theorem for functions of two variables (only statement); Maxima and Minima of functions of two variables; Lagrange’s Method of undetermined Multipliers; Rule of differentiation under integral sign.

I (5.1, 5.2, 5.4, 5.5 (1), 5.5 (2), 5.7 (1), 5.7 (2), 5.11 (1), 5.11 (2), 5.12, 5.13)

UNIT II

MULTIPLE INTEGRALS 08 hrs

Introduction to Double Integrals; Evaluation of Double Integrals; Evaluation of Double Integrals in polar coordinates; change of order of integration; Triple Integrals; Evaluation of Triple Integrals; Area by Double Integration; volume as Double Integral; volume as Triple Integral.

II (6.1 to 6.9 except 6.6)

UNIT III

LINEAR ALGEBRA 07 hrs

Introduction to determinants and matrices; Elementary row operations on a matrix: Rank of a matrix: Consistency of system of linear equation; Gauss elimination Method to solve system of Linear equations; Eigen Values and Eigen Vectors of Matrix; Properties of Eigen values; Solution of a system of linear equations.

I (2.1, 2.2, 2.5, 2.8 (1), 2.8 (2), 2.11 (1), 2.14 (1), 2.15, 28.6 (1)); II (3.39)

UNIT IV

NUMERICAL METHODS 07 hrs

Introduction; Solution of algebraic and transcendental equations; Regula – falsi method; Newton- Raphson method; Numerical solution of ordinary differential equation; Taylor’s Series method; Euler’s Method; Modified Euler’s Method; IV order Runge Kutta method; Gauss – Siedel Method to solve system of linear equations; Power method to obtain the dominant Eigen value of a Matrix and its corresponding Eigen Vector.

I (28.1, 28.2 (2), 28.2(3), 31.1, 31.3, 31.4, 31.5, 31.7, 28.7 (2), 28.9)

UNIT V

SOLUTIONS OF FIRST ORDER AND FIRST DEGREE ORDINARY DIFFERENTIAL EQUATION 07 hrs

Definition and Practical approach to differential equation; solutions of differential equation and geometrical meaning of differential equation; Solution by the Method of variable separable; Homogeneous differential equation; Equation reducible to homogenous differential equation; Linear equations; Bernoulli’s equation; Exact equation; To find orthogonal trajectories of the given family of curves; Physical applications.

I (11.1, 11.2, 11.4 (1), 11.4 (2), 11.5, 11.6, 11.7, 11.8, 11.9, 11.10, 11.11)

II (12.3, 12.4 (a), 12.4 (b), 12.5)

UNIT VI

LINEAR DIFFERENTIAL EQUATIONS OF HIGHER ORDER 07 hrs

Definition and General form of Linear differential equation of higher order; the operator D; complete solution of Linear differential equation as a sum of complementary function (C.F) and particular integral (P.I); Rules for finding the complementary function; the inverse operator 1/f (D); Rules for finding Particular integral; method of variation of parameter to find the Particular integral; Cauchy and Legendre Homogenous Linear equations; Simultaneous Linear equations with constant coefficients.

I (13.1, 13.2, 13.3, 13.4, 13.5, 13.6, 13.7, 13.8, 13.9, 13.11)

UNIT VII

SPECIAL FUNCTIONS AND SERIES SOLUTIONS OF DIFFERENTIAL EQUATIONS 08 hrs

Gamma functions; Recurrence formula for ┌ (n); value of ┌ (½); Beta Function; Symmetry of Beta Function; Relation between Gamma and Beta Function; Illustrative examples; Series solution of Differential equations (Method of Frobenius); Validity of series solution; series solution when X=0 is an ordinary point of the equation; series solution when X=0 is a regular singularity of the equation.

II (15.1 to 15.7 and 15.11 to 15.14)

UNIT VIII

BESSEL AND LEGENDRE DIFFERENTIAL EQUATION 08 hrs

Bessel equation-Bessel functions Recurrence formula for ; Generating Function for; Equations Reducible to Bessel’s equation Orthogonality of Bessel functions; Legendre’s differential equation; Legendre Polynomials; Rodrigue’s formula; Orthogonality of Legendre polynomials.

I (16.5 to 16.11, 16.13, 16.14 (1), 16.14 (2), 16.17)

Text Books:

I. Higher Engineering Mathematics, Dr. B.S.Grewal, 40th edition 2007, Khanna publishers, Delhi.

II. Text book of Engineering Mathematics, N.P. Bali and Manish Goyal, 7^thEdition 2007, Laxmi Publication (P) Ltd.

Reference book:

1. Advanced Engineering Mathematics, H.K. Dass, 17^th Revised Edition 2007, S.Chand & Company Ltd, New Delhi.

Note: Students have to answer FIVE full questions out of EIGHT questions to be set from each unit carrying 16 marks.

AE52 C & DATA STRUCTURES

PART A: C PROGRAMMING

UNIT I

INTRODUCTION TO THE C LANGUAGE AND DATA TYPES 07 hrs

The first program in C, Inputting the data, The control statement, The iteration loop, The do…while loop, The switch statement, Various data types in C, The integer data type family, Overflow in char and unsigned char data types, The char type, Octal numbers, Hexadecimal numbers, Representation of floating-point numbers, Type conversion, Forced conversion, Type casting.

C OPERATORS

Arithmetic operator, Relational operator, Logical operator, Ternary operator, Increment operator, Comma operator, Bitwise operator, Operator precedence.

I (1, 2, 3)

UNIT II

CONTROL STRUCTURES 08 hrs

Control structures, The if statement, Scope of an if clause, The if…else statement, The if…else…if statement, The switch statement, The while loop, The do…while loop, The for loop, The for loop with a comma operator, The break statement, The continue statement.

THE printf FUNCTION, THE scanf FUNCTION, ADDRESS AND POINTERS

printf, scanf, Placeholders in printf and scanf, Address, Pointers

I (4, 5, 6, 7)

UNIT III

ARRAYS 08 hrs

Arrays, Address of each element in an array, Accessing an array using pointers, Manipulating arrays using pointers, Two-dimensional arrays, Three-dimensional arrays, Pointer arrays.

FUNCTIONS AND RECURSION

Functions, The concept of (system) stack, The sequence of execution during function call, Parameter passing, Call by reference, The concept of Global variables, Resolving variable references, Syntax of function definition, Calling function, Dynamic memory allocations, Recursion, Stack overheads in recursion, Writing a recursive function.

I (9, 10, 12, 13)

UNIT IV

STRINGS 07 hrs

Strings as an array of characters, String definition, Strings as parameters.

STRUCTURES, UNIONS AND FILES

Structures, Complex structure definitions, Memory allocation to structure, Programming with structures, Structure pointers, Union, The concept of files, Direct access files.

I (14, 15, 16, 17)

PART B: DATA STRUCTURES

UNIT V

ARRAYS, SEARCHING AND SORTING 07 hrs

Arrays, Application of arrays, Manipulations on the list implemented using an array, Transpose of a matrix, Bubble sort, Binary search, Merging of two sorted lists, Merge sort, Implementation of heaps, Heap sort, Quick sort.

I (18)

UNIT VI

STACKS, QUEUES AND LINKED LISTS 08 hrs

The concept of stack and queues, Stacks, Applications of stacks, Queues, Circular queues, Applications of queues, The concept of linked lists, Inserting a node using recursive programs, Deleting the specified node in a singly linked list, Inserting a node after the specified node in a singly linked list, Circular linked lists, Doubly linked lists, Insertion of a node in a doubly linked list, Deleting a node from a doubly linked list, Polynomial representation, Sorting and reversing a linked list, Merging two sorted lists, Merging of two circular lists.

I (19, 20)

UNIT VII

TREES 07 hrs

The concept of tree, Binary tree and its representation, Binary tree traversal, Binary search tree, Counting the number of nodes in a binary search tree, Searching for a target key in a binary search tree, deletion of a node from a binary search tree.

I (21)

UNIT VIII

GRAPHS 08 hrs

Graphs, Representations of graphs, Computing in-degree and out-degree of a node of a graph using adjacency matrix representation, Depth first traversal, Breadth first traversal, Connected component of a graph, Depth first spanning tree, Breadth first spanning tree, Minimum cost spanning tree, Directed acyclic graph (DAG).

I (22)

Text Book:

I. C & Data Structures, P.S. Deshpande and O.G. Kakde, Dreamtech Press, 2005.

Reference Books:

1. Data Structures – A Pseudocode Approach with C, 2^nd Edition, Richard F. Gilberg and Behrouz A. Forouzan, Thomson Course Technology, 2005.

2. C Programming and Data Structures, 3^rd Edition, E. Balagurusamy, Tata McGraw Hill, 2007.

Note: Students have to answer FIVE full questions out of EIGHT questions to be set from each unit carrying 16 marks, selecting atleast TWO questions from each part.

AE53 ELECTRONIC DEVICES AND CIRCUITS

UNIT I

CIRCUIT THEORY 07 hrs

Introduction; Voltage and Current Sources; Resistance; The Basic laws of Electric Circuits; Resistances in Series and Parallel; General Methods of Network Analysis; Network Theorems; Step Response of RC Circuits; Duality of Networks; Sinusoidal Steady-State Circuit Analysis; Resonance; Miller’s Theorem; Two-port Networks.

I (10.1, 10.2, 10.3, 10.4, 10.5, 10.6, 10.7, 10.8, 10.9, 10.10, 10.11, 10.12, 10.13)

UNIT II

SEMICONDUCTORS, DIODES AND DIODE CIRCUITS 08 hrs

Introduction to Electronics, Typical Electronic Systems; Classification of Electronic Systems and Devices; The Future; Conduction in Solids; Doped Semiconductors; Junction Diodes; DC Analysis of Diode Circuits; Zener Diode as Voltage Regulator; Diode Circuits with Time-Varying Sources; Transition and Diffusion Capacitances; Switching Characteristics of a Diode; Special Purpose Diodes; Rectifiers and Power Supplies; Filters; Some Diode Wave Shaping Circuits; Additional examples.

I (1.1, 1.2, 1.3, 1.4, 1.5, 1.6, 1.7, 1.8, 1.9, 1.10, 1.11, 1.12, 1.13, 1.14, 1.15, 1.16, 1.17)

UNIT III

TRANSISTORS AND OTHER DEVICES 08 hrs

Introduction; Bipolar Junction Transistor; Junction Field Effect Transistor and Metal Oxide Semiconductor Field Effect Transistor; Four-Layer Devices – Thyristors; Additional Examples.

I (2.1, 2.2, 2.3, 2.5, 2.6)

UNIT IV

SMALL-SIGNAL MODELS, AMPLIFICATION AND BIASING 08 hrs

Introduction, Small-signal Transistor Models; Hybrid-π Model; h-Parameter Model; Transistor Biasing; Bias Design, AC Gain, Input-Output Impedances; Some Special Circuits; Darlington Pair; Feedback Pair; Emitter Coupled Pair; CMOS Circuits; Additional Examples.

I (3.1, 3.2, 3.3, 3.4, 3.5, 3.7, 3.8, 3.9, 3.10, 3.11, 3.12, 3.13)

UNIT V

SMALL-SIGNAL AMPLIFIERS-FREQUENCY RESPONSE 08 hrs

Introduction; Single-Stage RC-Coupled Amplifier; Frequency Response; Tuned Amplifier; Gain-Bandwidth Product; Multistage Amplifiers; Additional Examples.

I (4.1, 4.2, 4.3, 4.4, 4.5, 4.6, 4.8)

UNIT VI

LARGE-SIGNAL AMPLIFIERS 07 hrs

Amplifier Classes; Class-A Power Amplifiers; Transformer-Coupled Power Amplifier; Class-B Power Amplifier; Complementary-Symmetry Circuits; Distortion in Amplifiers; Class-AB Amplifiers; Class-C Power Amplifiers; Additional Examples.

I (5.1, 5.2, 5.3, 5.4, 5.5, 5.6, 5.7, 5.8, 5.10)

UNIT VII

FEEDBACK AMPLIFIERS AND OSCILLATORS 07 hrs

Feedback Concepts; Types of Feedback Circuits; Block Diagram Representation of Feedback Amplifiers; Effect of Feedback on Impedances; Some Negative Feedback Circuits; Properties of Negative Feedback; Stability in Feedback Amplifiers; Oscillator Operation; Phase Shift Oscillators; Wein Bridge Oscillators; Tuned Oscillators; Crystal Oscillators; Unijunction Oscillator; Additional Examples.

I (6.1, 6.2, 6.3, 6.4, 6.5, 6.6, 6.7, 6.8, 6.9, 6.10, 6.11, 6.12, 6.13, 6.15)

UNIT VIII

INTEGRATED CIRCUITS FABRICATION 07 hrs

Introduction; Pre-Fabrication Stage; IC Fabrication; The Planar Processes; Illustration-A Simple IC Fabrication; Monolithic Transistors-Bipolar; Fabrication of MOSFET; Monolithic Diodes; Integrated Resistors; Integrated Capacitors; Metal-Semiconductor Contact; Characteristics of IC Components; Monolithic Circuit Layout; Levels of Integration.

I (9.1, 9.2, 9.3, 9.4, 9.5, 9.6, 9.7, 9.8, 9.9, 9.10, 9.11, 9.12, 9.13, 9.14)

Text Book:

I. Electronic Devices and Circuits, I. J. Nagrath, PHI (2007).

Reference Books:

1. Millman’s Electronic Devices and Circuits, Jacob Millman, Christos C Halkias and Satyabrata Jit, Second Edition, 2007 First reprint, Tata-McGraw Hill Publication.

2. Electronic Devices and Circuits, David A Bell ,Fourth Edition, PHI (2006).

Note: Students have to answer FIVE full questions out of EIGHT questions to be set from each unit carrying 16 marks.

AE54 INEAR ICs AND DIGITAL ELECTRONICS

PART A: LINEAR ICs

UNIT I

INTEGRATED CIRCUIT FABRICATION & OPERATIONAL AMPLIFIER 07hrs

Introduction, Classification; IC Chip Size and Circuit Complexity; Fundamentals of Monolithic IC Technology; Basic Information of Op-Amp; The Ideal Operational Amplifier; Operational Amplifier Internal Circuit.

I (1.1, 1.2, 1.3, 1.4, 2.1, 2.2, 2.3, 2.4, 2.4.1, 2.4.2)

UNIT II

OPERATIONAL AMPLIFIER CHARACTERISTICS 04 hrs

Introduction; DC Characteristics; AC Characteristics; Frequency Response; Stability of Op-Amp (Qualitative Analysis); Slew Rate; Analysis of Data Sheets of an Op-Amp.

I (3.1, 3.2, 3.3, 3.3.1, 3.3.2, 3.3.4, 3.4)

OPERATIONAL AMPLIFIER APPLICATIONS 03 hrs

Introduction; Basic Op-Amp Applications; Instrumentation Amplifier; AC Amplifier; V to I and I to V Converters.

I (4.1, 4.2, 4.3, 4.4, 4.5)

UNIT III

OPERATIONAL AMPLIFIER APPLICATIONS (Continued…) 06 hrs

Op-Amp Circuits using Diodes; Sample and Hold Circuit; Differentiator; Integrator; Monolithic Power Amplifiers.

I (4.6, 4.7, 4.10, 4.11, 4.13)

COMPARATORS 02 hrs

Introduction; Comparator; Regenerative Comparator (Schmitt Trigger).

I (5.1, 5.2, 5.3)

UNIT IV

WAVEFORM GENERATORS AND 555 TIMER 05 hrs

Square Wave Generator; Astable Multivibrator; Monostable Multivibrator; Triangular Wave Generator; Description of Functional Diagram of 555 Timer; Monostable Operation; Astable Operation.

I (5.4, 5.5, 5.6, 8.1, 8.2, 8.3, 8.4, (8.3.1 and 8.4.1 not Included))

VOLTAGE REGULATOR D-A AND A-D CONVERTERS 03 hrs

Introduction; Series Op-Amp Regulator; Basic DAC Techniques; A-D Converters

I (6.1, 6.2, 10.1, 10.2, 10.2.1, 10.2.2, 10.3, 10.3.1, 10.3.4)

PART B: DIGITAL ELECTRONICS

UNIT V

INTRODUCTORY CONCEPTS 03 hrs

Introduction; Numerical Representations; Digital and Analog Systems; Digital Number Systems; Representing Binary Quantities; Digital Circuits / Logic Circuits; Parallel and Serial Transmission; Memory; Digital Computers.

II (1.1, 1.2, 1.3, 1.4, 1.5, 1.6, 1.7, 1.8)

NUMBER SYSTEMS AND CODE’s 04 hrs

Introduction; Binary to Decimal Conversions; Decimal to Binary Conversions; Octal Number System; Hexadecimal Number System; BCD Code; Putting it all together; The Byte; Nibble and Word; Alphanumeric Codes; Parity Method for Error Detection.

II (2.1, 2.2, 2.3, 2.4, 2.5, 2.6, 2.7, 2.8, 2.9)

UNIT VI

DESCRIBING LOGIC CIRCUITS 04 hrs

Introduction; Boolean Constants and Variables; Truth Tables: OR, AND, NOT Operations; NOR, NAND Gates; Boolean Theorems; De-Morgan’s Theorems; Universality of NAND and NOR Gates.

II (3.1, 3.2, 3.3, 3.4, 3.5, 3.9, 3.10, 3.11, 3.12)

COMBINATIONAL LOGIC CIRCUITS 04 hrs

Introduction; Sum of Product Form; Simplifying Logic Circuits; Algebraic Simplification; Designing Combinational Logic Circuits; Karnaugh Map Method (3 and 4 Variables); Exclusive OR and Exclusive NOR Circuits.

II (4.1, 4.2, 4.3, 4.4, 4.5, 4.6)

UNIT VII

DIGITAL ARITHMETIC: OPERATIONS AND CIRCUITS 04 hrs

Introduction; Binary Addition; Representing Signed Numbers; Addition and Subtraction in 2’s Complement System; BCD Addition; Arithmetic Circuits; Parallel Binary Adder; Design of a Full Adder; Carry Propagation; BCD Adder.

II (6.1, 6.2, 6.3, 6.4, 6.7, 6.9, 6.10, 6.11, 6.13, 6.16)

MSI LOGIC CIRCUITS 04 hrs

Introduction; Decoders; Encoders; Multiplexers; De-Multiplexers (Application Not Included); Magnitude Comparator.

II (9.1, 9.4, 9.5, 9.7, 9.8)

UNIT VIII

FLIP-FLOPS AND THEIR APPLICATIONS 04hrs

Introduction; NAND Gate Latch; NOR Gate Latch; Clock Signals and Clocked Flip-Flops; Clocked SR Flip-Flop; Clocked JK Flip-Flop; Clocked D Flip-Flop; D Latch; Asynchronous Inputs.

II (5.1, 5.2, 5.3, 5.4, 5.5, 5.6, 5.7, 5.8)

COUNTERS AND REGISTERS 03 hrs

Introduction; Asynchronous Counters; Propagation Delay in Ripple Counters; Synchronous (Parallel) Counters; Integrated Circuit Registers; Parallel In / Serial Out; Parallel In / Parallel Out; Serial In / Serial Out; Serial In / Parallel Out registers; Shift Register Counters.

II (7.1, 7.5, 7.6, 7.15, 7.16, 7.17, 7.18, 7.19, 7.21)

Text Books:

I. Linear Integrated Circuits, Revised Second Edition, D Roy Choudhury, Shail B. Jain, New Age International Publishers.

II. Digital Systems – Principles and Applications, Ninth Edition, Ronald J Tocci, Neal S Widmer and Gregory L. Moss, Pearson Education, 2008.

Reference Books:

1. Operational Amplifiers and Linear IC’s, , David A Bell, Second Edition, PHI.

2. Digital Fundamentals, Thomas L. Floyd and R. P. Jain, Eighth edition, Pearson Education Publisher.

3. Digital Electronics and Microprocessors – Problems and Solutions, R. P. Jain, 2007, Tata-McGraw Hill.

Note: Students have to answer FIVE full questions out of EIGHT questions to be set from each unit carrying 16 marks, selecting atleast TWO questions from each part.

AE55 PRINCIPLES OF ELECTRICAL ENGINEERING

UNIT I

MAGNETIC CIRCUITS 07 hrs

Magnetic Effects of Electric Current; Magnetic Circuits; Magnetic Materials and Magnetization Characteristics; Electromagnetic Induction and Force; Lorentz Force Equation; Self and Mutual Inductance; Energy Stored In Magnetic Systems; AC Operation of Magnetic Circuits; Hysteresis and Eddy Current Losses.

I (8.2, 8.3, 8.4, 8.5, 8.6, 8.7, 8.8, 8.9)

UNIT II

TRANSFORMERS 08 hrs

Construction - Core and Shell Types; Ideal Transformer – Under No-Load and Loading Conditions; Impedance Transformation; Magnetizing Current and Core Loss; Circuit Model of Transformer; Voltage Regulation; Efficiency.

I (9.1, 9.2, 9.3, 9.4, 9.7, 9.8)

UNIT III

D.C. MACHINES 08 hrs

Construction; EMF Equation; Torque Equation; Circuit Model – Generating and Motoring Modes; Armature Reaction; Commutation; Methods of Excitation; Characteristics of DC Motors; Speed Control of Shunt Motor (Field and Armature Control); DC Motor Starting; Efficiency of DC Motors; Application of DC Motors

I (10.2, 11.2, 11.3, 11.4, 11.5, 11.6, 11.7, 11.8, 11.9, 11.10)

UNIT IV

SYNCHRONOUS MACHINES 08 hrs

Construction; EMF Expression (with Winding Factor); Circuit Model; Power-Angle Characteristic; Operation at Constant Load Variable Excitation.

I (10.2, 10.3, 10.4, 12.2)

UNIT V

INDUCTION MACHINES 08 hrs

Construction; Rotating Magnetic Field; Torque Expression; Circuit Model; Torque-Slip Characteristic; Efficiency; Starting; Speed Control; Application of Induction Motors; Induction Machine; Induction Generator.

I (10.6, 10.7, 12.3, 12.4)

UNIT VI

FRACTIONAL kW MOTORS 07 hrs

Single Phase Induction Motor; Split-Phase Motor; Two-Value Capacitor Motor; Shaded-Pole Motor; Reluctance Motor; Hysteresis Motor; Universal Motor.

I (13.1, 13.2, 13.3, 13.4)

UNIT VII

GENERATION 07hrs

Energy Conversion; Thermal Power; Nuclear Power; Hydro Power; Magneto Hydrodynamic; Geothermal Energy; Environmental Aspects; Renewable Energy Resources; Solar Power; Wind Power; Biofuels.

I (15.1, 15.2, 15.3, 15.4, 15.5, 15.6, 15.7, 15.8, 15.9, 15.10, 15.11, 15.12)

UNIT VIII

TRANSMISSION, DISTRIBUTION AND ENERGY STORAGE 07 hrs

Transmission and Distribution Systems; Purpose of Interconnection; HVDC Transmission-Principle, Economics, Advantages and Disadvantages; Energy Storage-Compressed Air Storage; Heat Storage; Batteries; Hydrogen Energy Systems; Fuel Cell.

I (15.14, 15.15, 15.16)

Text Book:

I. Basic Electrical Engineering, D.P. Kothari and I.J. Nagrath, Tata McGraw-Hill Publishing Company Limited, 2^nd Edition, 13^th Reprint 2006.

Reference Books:

1. Electric Machines, I.J. Nagrath and D.P. Kothari, Tata McGraw-Hill Publishing Company Limited.

2. Power System Engineering, I.J. Nagrath and D.P. Kothari, Tata McGraw-Hill Publishing Company Limited.

Note: Students have to answer FIVE full questions out of EIGHT questions to be set from each unit carrying 16 marks.

AE91 ANALOG ELECTRONICS LAB

List of Experiments

1. Characteristics of Semiconductor Diode and Zener Diode: Determination of forward and reverse resistance from VI characteristics.

2. Static Characteristics of BJT under CE Mode: Determination of h-parameters h_ie, h_re from input characteristics and h_fe & h_oe from output characteristics.

3. Static Characteristics of JFET: Determination of r_d from drain characteristics and g_m from mutual characteristics and hence obtain μ.

4. Characteristics of UJT: Determination of intrinsic standoff ratio h from emitter characteristics.

5. Resonant Circuits: Characteristics of Series and Parallel Circuits, Determination of quality factor and bandwidth.

6. Bridge Rectifier with and without C-Filter: Display of output waveforms and Determination of ripple factor, efficiency and regulation for different values of load current.

7. Diode Clipping Circuits: Design and display the transfer characteristics of single ended series, shunt type and double ended shunt type clipping circuits.

8. RC Coupled Single-stage BJT Amplifier: Determination of lower and upper cutoff frequencies, mid band voltage gain, gain bandwidth product from the frequency response and Determination of input and output impedances at mid frequency range.

9. Emitter Follower: Determination of mid band voltage gain, input and output impedances at mid frequency range.

10. Class-B Complementary Symmetry Power Amplifier: Display of input and output waveforms and Determination of the conversion efficiency and optimum load.

11. BJT Colpitt’s Oscillator: Design and test the performance for a given frequency.

12. Study of Basic Op-Amp Circuits: Design and verification of inverting amplifier, non-inverting amplifier, voltage follower, integrator, differentiator and inverting adder circuits.

13. Schmitt Trigger: Design, testing, and display of waveforms.

14. Op-Amp Wein Bridge Oscillator: Design and test the performance for the given frequency.

15. Study of 555 Timer: Design and test the performance of Astable multivibrator circuit for a given frequency.

16. Study of Voltage Regulator: Design and study of IC7805 voltage regulator, calculation of line and load regulation.

Note: Minimum of 14 experiments to be conducted.

AE56 ENGINEERING MATHEMATICS – II

UNIT I

COMPLEX ANALYSIS 08 hrs

Introduction; Function of complex variable w= f (z); Limit of a complex function; continuity of w - f (z); Derivative of f (z); Analytic function; Cauchy Riemann equations (both in Cartesian and polar form); Harmonic functions; Application to flow problems; construction of Analytic functions using Milne Thomson method; Geometric representation of w = f (z); standard transformation; Bilinear transformation; conformal transformation; Special conformal Transformations.

I (20.1, 20.2(1), 20.2(2), 20.3(1), 20.3(2), 20.4, 20.5(1), 20.6, 20.7, 20.8, 20.9, 20.10)

UNIT II

COMPLEX INTEGRATION 07 hrs

Line integral of w=f(z); Cauchy’s theorem; Cauchy’s integral formula; Morera’s theorem; Series of complex terms; Taylor’s and Laurent’s series; singularities of analytic function; Types of singularities; Residues; residue theorem; calculation of residues.

I (20.12, 20.13, 20.14, 20.15, 20.16, 20.17, 20.18, 20.19)

UNIT III

VECTOR CALCULUS 08 hrs

Introduction to vectors; Differentiation of vectors; curves in space; velocity and acceleration; scalar and vector point functions; vector operator del; Del applied to scalar point functions; Gradient; Del applied to vector point functions; Divergence and curl; Physical interpretation of Divergence and Curl; Del applied twice to point functions and products of point functions; vector identities.

I (8.1, 8.2, 8.3, 8.4, 8.5, 8.6, 8.7(1), 8.7(2), 8.8, 8.9)

UNIT IV

VECTOR INTEGRATION 08 hrs

Integration of vectors; Line integral; surfaces; surface integral; Green’s theorem in a plane (only statement and problems); Stoke’s theorem (only statement and problems); volume integral; Gauss divergence theorem (only statement and problem).

I (8.10 to 8.16)

UNIT V

NUMERICAL METHODS 07 hrs

Forward difference operator; backward difference operator; central difference operator; shifting operator E (only the definition); Interpolation; Newton Gregory forward and backward interpolation for equal intervals; Lagrange’s formula for unequal intervals; Divided differences; Newton’s divided difference formula; Inverse interpolation; Numerical differentiation using Newton Gregory forward and backward interpolation formula; Numerical integration; Newton–Cote’s quadrature formula; trapezoidal rule; Simpson’s 1/3^rd & Simpson’s 3/8^th rule; Weddle’s rule

I (29.8(1), 29.8(2), 29.8(3), 29.9)

II (22.1, 22.3, 22.4, 22.6, 22.7, 22.10, 22.11, 22.11(a), 22.11(b), 22.11(c), 22.11(d), 22.11(e))

UNIT VI

PARTIAL DIFFERENTIAL EQUATION 07 hrs

Introduction; Formulation of partial differential equations; solutions of a partial differential equations; Equations solvable by direct integration; Lagrange’s linear partial differential equation of first order; Solutions of non linear partial differential equations by Charpit’s method; Solution of homogenous partial differential equation by the method of separation of variables.

I (17.1, 17.2, 17.3, 17.4, 17.5, 17.7, 18.2)

UNIT VII

THEORY OF PROBABILITY 07 hrs

Introduction; Basic terms and definitions; probability and set notation; theorem of total probability; independent events; theorem of compound probability; conditional probability ; Baye’s theorem.

I (26.1, 26.2, 26.3, 26.4, 26.5(1), 26.5(2), 26.6); II (21.48)

UNIT VIII

RANDOM VARIABLES 08 hrs

Random Variable; Discrete and continuous random variables; discrete and continuous probability distribution; probability mass and density function; mean and variance of discrete and continuous probability distribution; theoretical distributions; Binomial distribution; constants of the Binomial distribution; Binomial frequency distribution; Applications Binomial distribution; Poisson’s distribution; constants of the Poisson distribution; Applications Poisson distribution; Normal distribution.

I (26.7, 26.8(1), 26.9, 26.10, 26.14(1), 26.14(2), 26.14(3), 26.14(4), 26.15(1), 26.15(2), 26.15(3), 26.16)

Text Books:

I. Higher Engineering Mathematics –Dr. B.S.Grewal, 40th Edition 2007, Khanna Publishers, Delhi.

II. A Text book of engineering Mathematics – N.P. Bali and Manish Goyal , 7^th Edition 2007, Laxmi Publication(P) Ltd.

Reference book:

1. Advanced Engineering Mathematics- H.K. Dass- 17^th Revised Edition 2007, S.Chand & Company Ltd, New Delhi.

Note: Students have to answer FIVE full questions out of EIGHT questions to be set from each unit carrying 16 marks.

AE57 SIGNALS AND SYSTEMS

UNIT I

SIGNALS AND SYSTEMS 03 hrs

Continuous and Discrete-Time Signals; Transformations of the Independent Variable; Exponential and Sinusoidal Signals; Unit Impulse and Unit Step Functions; Continuous and Discrete -Time Systems; Basic System Properties.

I (1.0, 1.1, 1.2, 1.3, 1.4, 1.5, 1.6)

LINEAR-TIME INVARIANT SYSTEMS 04 hrs

Discrete-Time LTI Systems: The Convolution Sum; Continuous-Time LTI Systems: The Convolution Integral; Properties of Linear Time-Invariant Systems; Causal LTI Systems Described by Differential and Difference Equations.

I (2.0, 2.1, 2.2, 2.3, 2.4)

UNIT II

FOURIER SERIES REPRESENTATION OF PERIODIC SIGNALS 07 hrs

Response of LTI Systems to Complex Exponentials; Fourier Series Representation of Continuous-Time Periodic Signals; Convergence of the Fourier Series; Properties of Continuous-Time Fourier Series; Fourier Series Representation of Discrete-Time Periodic Signals; Properties of Discrete-Time Fourier Series; Fourier Series and LTI Systems; Filtering; Examples of Continuous-Time Filters Described by Differential Equations; Examples of Discrete-Time Filters Described by Difference Equations.

I (3.0, 3.2, 3.3, 3.4, 3.5, 3.6, 3.7, 3.8, 3.9, 3.10, 3.11)

UNIT III

THE CONTINUOUS-TIME FOURIER TRANSFORM 07 hrs

Representation of Aperiodic Signals; The Continuous-Time Fourier Transform; The Fourier Transform for Periodic Signals; Properties of Continuous-Time Fourier Transform; The Convolution and Multiplication Properties; Fourier Transform Properties and Fourier Transform Pairs; Systems Characterized by Linear Constant-Coefficient Differential Equations.

I (4.0, 4.1, 4.2, 4.3, 4.4, 4.5, 4.6, 4.7)

UNIT IV

THE DISCRETE-TIME FOURIER TRANSFORM 08 hrs

Representation of Aperiodic Signals: The Discrete-Time Fourier Transform; The Fourier Transform for Periodic Signals; Properties of Discrete-Time Fourier Transform; The Convolution and Multiplication Properties; Fourier Transform Properties and Fourier Transform Pairs; Duality; Systems Characterized by Linear Constant-Coefficient Difference Equations.

I (5.0, 5.1, 5.2, 5.3, 5.4, 5.5, 5.6, 5.7, 5.8)

UNIT V

TIME AND FREQUENCY CHARACTERIZATION OF SIGNALS AND SYSTEMS 04 hrs

The Magnitude-Phase Representation of The Fourier Transform; The Magnitude-Phase Representation of The Frequency Response of LTI Systems; Time-Domain Properties of Ideal Frequency-Selective Filters; Time-Domain and Frequency-Domain Aspects of Non Ideal Filters; First-Order and Second-Order Discrete-Time Systems.

I (6.0, 6.1, 6.2, 6.3, 6.4, 6.6)

SAMPLING 04 hrs

Representation of a Continuous-Time Signal by its Samples; The Sampling Theorem; Reconstruction of a Signal From its Samples Using Interpolation; The Effect of Under Sampling; Aliasing; Discrete-Time Processing of Continuous-Time Signals; Sampling of Discrete-Time Signals.

I (7.0, 7.1, 7.2, 7.3, 7.4, 7.5)

UNIT VI

THE LAPLACE TRANSFORMS 08 hrs

The Laplace transform; The Region of Convergence for Laplace Transforms; The Inverse Laplace Transform; Geometric Evaluation of the Fourier Transform from the Pole-Zero Plot; Properties of the Laplace Transform; Laplace Transform Pairs; Analysis and Characterization of LTI Systems Using the Laplace Transform.

I (9.0, 9.1, 9.2, 9.3, 9.4, 9.5, 9.6, 9.7)

UNIT VII

THE Z-TRANSFORM 08 hrs

The Z-Transform; The Region of Convergence for the Z-Transform; The Inverse Z-Transform; Geometric Evaluation of the Fourier Transform from the Pole-Zero Plot; Properties of the Z-Transform; Z-Transform Pairs; Analysis and Characterization of LTI Systems using Z-Transforms.

I (10.0, 10.1, 10.2, 10.3, 10.4, 10.5, 10.6, 10.7)

UNIT VIII

RANDOM PROCESSES 07 hrs

Introduction; Mathematical Definition of a Random Process; Stationary Processes; Mean, Correlation and Covariance Functions; Ergodic Processes; Transmission of a Random Process Through a Linear Time-Invariant Filter; Power Spectral Density; Gaussian Process; Noise; Narrowband Noise; Summary and Discussion.

II (1.1 to 1.10, 1.15)

Text Books:

I. Signals and Systems, A.V. Oppenheim and A.S. Willsky with S. H. Nawab, Second Edition, PHI Private limited, 2006.

II. Communication Systems, Simon Haykin, 4^th Edition, Wiley Student Edition, 7^th Reprint 2007.

Reference Books:

1. Signals and Systems, Second Edition, S. Haykin and B. Van Veen, John Wiley & Sons.

2. Schaum’s Outline of Theory and Problems of Signals and Systems, McGraw-Hill Publishing Company Ltd.

3. Signals and Systems, M.J. Roberts, Tata McGraw-Hill Publishing Co. Ltd.

4. Probabilistic Methods of Signal and System Analysis, Third Edition, G.R. Cooper and C.D. McGillem, Oxford University Press.

Note: Students have to answer FIVE full questions out of EIGHT questions to be set from each unit carrying 16 marks.

AE58 MATERIALS & PROCESSES

UNIT I

CRYSTAL GEOMETRY, ATOMIC STRUCTURE & BONDING 08 hrs

Geometry of crystals-Space Lattices; Bravais Lattice-SC, BCC & FCC lattices; Crystal Structure, Directions & Planes; Miller Indices; Structure determination by X-ray diffraction; Bragg’s law; The Powder Method; Structure Determination; Structure of Atom-Quantum states; Periodic Table; Ionization Potential; Electron Affinity & Electronegativity; Chemical Bonding-Bond energy; Bond Type and Bond Length.

Ionic Bonding-Production of Ions of Opposite Sign-Coulomb Attraction; Short Range Repulsion and Covalent Bonding; Metallic Bonding; Secondary Bonding; Variation in bonding Character and properties.

I (3.1, 3.2, 3.3, 3.4, 3.5, 3.6, 4.1, 4.2, 4.3, 4.4, 4.5, 4.6, 4.7, 4.8, 4.9)

UNIT II

STRUCTURE OF SOLIDS & CRYSTAL IMPERFECTIONS 08 hrs

Crystalline & Non-crystalline states; Inorganic solids; Covalent solids; Metals and Alloys; Ionic Solids; Structure of Silica & Silicates; Polymers-Classification; Structure of Long Chain Polymers; Crystallinity of Long Chain Polymers; Crystal Imperfections-Point imperfections; Enthalpy; Gibbs Free Energy; Geometry of Dislocation; Other Properties of Dislocation; Surface Imperfections.

I (5.1, 5.2, 5.3, 5.4, 5.5, 5.6, 5.7, 5.8, 6.1, 6.2, 6.3, 6.4)

UNIT III

DIFFUSION IN SOLIDS & CONDUCTING MATERIALS 08 hrs

Diffusion in Solids-Fick’s Law of Diffusion; Solution to Fick’s Second Law;

Application Fick’s Second Law Solution-Experimental Determination of D; Corrosion Resistance of Duralumin; Carburization and Decarburization of Steel; Doping of Semiconductors; Kirkendall Effect; Atomic Model of Diffusion; Other Diffusion Processes; Introduction; Resistivity and Factors Affecting Resistivity of conducting materials; Motion of Electron in Electric Field; Equation of Motion of An Electron; Current Carried by Electron; Mobility; Energy Levels of a Molecule; Fermi Energy; Fermi-Dirac Distribution; Contact Potential; Effect of Temperature on Electrical Conductivity of Metals; Superconductivity; Electrical Conducting Materials-Copper, Aluminium, Tungsten, Carbon and graphite, Iron and Steel, Nickel, Lead and Tin.

I (8.1, 8.2, 8.3, 8.4, 8.5, 8.6)

II (2.1, 2.2, 2.3, 2.4, 2.5, 2.6, 2.7, 2.8, 2.9, 3.6, 3.7, 3.8, 3.9)

UNIT IV

DIELECTRIC MATERIALS IN STATIC & ALTERNATING FIELDS 08 hrs

Dielectric Materials in Static Fields-Effect of a Dielectric on the Behavior of a Capacitor; Polarization; Dielectric Constant of Monatomic Gas; Polarization Mechanisms-Electronic, Ionic and Dipolar Polarization; Internal Fields in Solids and Liquids-Lorentz Field; Clausius-Mosotti Relation; Polarisability; Catastrophe. Dielectric Materials in Alternating Fields-Frequency Dependence of Electronic Polarizability; Permittivity; Ionic Polarizability; Dielectric Losses and Loss Tangent; Dipolar Relaxation; Frequency and Temperature Dependence of Dielectric Constant of Polar Dieletrics; Dielectric Properties of Polymeric Systems; Ionic Conductivity in Insulators; Insulating Materials; Breakdown in Gaseous; Liquid and Solid Dielectric Materials; Ferro Electricity and Piezoelectricity.

II (4.1, 4.2, 4.3, 4.4, 4.5, 4.6, 4.7, 5.1, 5.2, 5.3, 5.4, 5.5, 5.6, 5.7, 5.8, 5.9, 5.10, 5.11, 5.11.1, 5.12, 5.13)

UNIT V

MAGNETIC MATERIALS 07 hrs

Introduction; Classification of Magnetic Materials; Origin of Permanent Magnetic Dipoles-Diamagnetism; Paramagnetism; Ferromagnetism-Origin and Ferromagnetic Domains; Magnetization and Hysteresis loop; Magnetostriction; Factors Affecting Permeability and Hysteresis Loss; Common Magnetic Materials -Iron and Silicon Iron Alloys; Nickel-Iron Alloys and Permanent Magnet Materials and Design of Permanent Magnets; Anti-Ferromagnetism and Ferrimagnetism; Magnetic Resonance.

II (6.1, 6.2, 6.3, 6.4, 6.5, 6.6, 6.7, 6.8, 6.9, 6.10, 6.11, 6.12, 6.13, 6.14, 6.15, 6.16)

UNIT VI

SEMICONDUCTING MATERIALS 07 hrs

Introduction; Energy Bands in Conductors, Semiconductors and Insulators; Types of Semiconductors; Intrinsic Semiconductors; Impurity Type Semiconductor; Interaction of Semiconductor with Time-Dependent Fields; Diffusion and Einstein Relation; Hall-Effect-Hall Voltage, Hall coefficient; Thermal Conductivity of Semiconductors; Electrical Conductivity of Doped Materials; Materials for Fabrication of Semiconductor Devices.

Passive Materials Integral to Device-Metals; Capacitance Materials; Junction Coatings; Device Potting; Packaging; Process Aids; Susceptor Materials; Reactor; Envelopes; Plastics and Pump fluids; Solvents and Etchants.

II (7.1, 7.2, 7.3, 7.4, 7.5, 7.6, 7.7, 7.8, 7.9, 7.10, 7.11, 7.12, 7.13, 7.13.1)

UNIT VII

SEMI CONDUCTING DEVICES & ELECTRONIC COMPONENT MATERIALS 07 hrs

Metal-Semiconductor contacts; P-N Junction; Barrier Capacitance; Breakdown Phenomena in Barrier Layer-Zener and Avalanche Breakdown; Junction Diodes-Zener, Varactor and Tunnel Diodes; Junction Transistor; Thermistors and Varistors; Semiconductor Materials-Silicon and Germanium; Silicon-Germanium Mixed Crystals; Silicon Carbide and Intermetallic Compounds; Silicon Controlled Rectifier-Two Transistor and Electromechanical Analogue; Materials for Electronic Components; Resistors-Carbon Composition; Insulated-Moulded; Film type; Cracked Carbon and Alloy Resistors; Metal-Oxide Film; Wire-Wound; High-Value; Non-Linear; Voltage-Sensitive; Non-Symmetrical and Variable Resistors. Capacitors-Paper, Mica, Ceramic, Glass-dielectric, Vitreous-enamel, Plastic, Electrolytic, Air-dielectric and Variable Capacitors; Inductors-Air-cored coils; Laminated-core; Powdered-core and Ferrite-core Inductors; Relays-Reed; Moving Coil; Induction; Thermal Type Relays; Electronic Valves; Function of Relays; Dry-reed; Mercury-wetted and Ferreed Relays.

II (8.2, 8.3, 8.4, 8.5, 8.6, 8.7, 8.8, 8.9, 12.2, 12.3, 12.4, 12.5)

UNIT VIII

FABRICATION PROCESSES OF SEMI CONDUCTORS 07 hrs

Fabrication Technology – Czochralski method of growing single crystal semiconductor, Zone-refining. Grown Junction and Alloyed junction processes – Alloyed junction diode and Gold-bonded diode. Diffused Junction Technique and Epitaxial diffused Junction diode. Fabrication of Junction Transistors – Grown junction, alloyed junction, Surface barrier alloyed junction, Diffused mesa. Planar diffused and Epitaxial planar diffused Transistors. Field-effect Devices – General properties and types. Drain and Transfer Characteristics of JFET.

II (14.1, 14.2, 14.3, 14.4, 14.5, 14.6, 14.7, 14.8, 14.9)

Text Books:

I. Materials Science and Engineering – A First Course by V. Raghavan, Fifth Edition, Thirty-Fourth Print, April 2007 Edition, Prentice-Hall Of India Pvt Ltd.

II. Introduction to Electrical Engineering Materials by C.S. Indulkar and S. Thiruvengadam, 4^th Edition, Reprint 2006, S. Chand and Company Ltd.

Reference Books:

1. Electronic Engineering Materials and Devices, John Allison, Tata McGraw Hill, New Delhi.

2. Elements of Materials Science and Engineering, Lawrence H. Van Vlack, Pearson Education (6^th Edition)

3. A text book of Material Science and Metallurgy, O.P. Khanna, Dhanpat Rai Publications, New Delhi

Note: Students have to answer FIVE full questions out of EIGHT questions to be set from each unit carrying 16 marks.

AE59 CIRCUIT THEORY AND DESIGN

UNIT I

CONVENTIONS FOR DESCRIBING NETWORKS 02 hrs

Reference Directions for Current and Voltage; Active Element Conventions; Topological Description of Networks.

I (2.1, 2.2, 2.4)

NETWORK EQUATIONS 05 hrs

Kirchhoff’s Laws; Source Transformations; Formulation of Network Equations; Loop and Node Variable Analysis; Duality.

I (3.1, 3.3, 3.4, 3.5, 3.6, 3.8)

UNIT II

INITIAL CONDITIONS IN NETWORKS 02 hrs

Initial Conditions in Elements; Geometrical Interpretation of Derivatives; Procedure for Evaluating Initial conditions.

I (5.1, 5.2, 5.3, 5.4)

DIFFERENTIAL EQUATIONS 03 hrs

Networks Excited by External Energy Sources; Response as related to the s-plane Location of Roots; General Solutions in terms of s, Q and ω_n.

I (6.3, 6.4, 6.5)

SIGNALS, AMPLITUDE, PHASE & DELAY 03 hrs

General Description of Signals; Amplitude and Phase Response; Single-Tuned Circuits; Double-Tuned Circuits; On Poles and Zeros and Time Delay.

II (2.2, 8.1, 8.3, 8.4, 8.5)

UNIT III

THE LAPLACE TRANSFORMATION 04 hrs

The Laplace Transformation; Some Basic Theorems; Examples of the Solution of Problems with the Laplace Transformation; Partial Fraction Expansion; Heaviside’s Expansion Theorem; Examples of Solution by the Laplace Transformation.

I (7.1, 7.2, 7.3, 7.4, 7.5, 7.6, 7.7)

TRANSFORMS OF OTHER SIGNAL WAVEFORMS 04 hrs

The Shifted Unit step function; The Ramp and Impulse Functions; Waveform Synthesis; The Initial and Final values of f (t) from F (s); the Convolution Integral.

I (8.1, 8.2, 8.3, 8.4, 8.5)

UNIT IV

IMPENDANCE FUNCTIONS AND NETWORK THEOREMS 07 hrs

The Concept of Complex Frequency; Transform Impedance and Transform Circuits; Series and Parallel Combinations of Elements; Superposition and Reciprocity; Thevenin and Norton Theorems.

I (9.1, 9.2, 9.3, 9.4, 9.5)

UNIT V

NETWORK FUNCTIONS; POLES AND ZEROS 05 hrs

Terminal Pairs or Ports; Network Functions for the One-Port and Two-Port; The Calculation of Network Functions; Poles and Zeros of Network Functions; Restrictions on Pole and Zero Locations for driving point and Transfer Functions; Time-Domain Behaviour from the Pole and Zero Plot

I (10.1, 10.2, 10.3, 10.4, 10.5, 10.6, 10.7)

ELEMENTS OF REALISABILITY THEORY 03 hrs

Causality and Stability; Hurwitz Polynomials; Positive Real Functions; Elementary Synthesis Procedures.

II (10.1, 10.2, 10.3, 10.4)

UNIT VI

TWO-PORT PARAMETERS 07 hrs

Relationship of Two-Port Variables; Short-Circuit Admittance, Open-Circuit Impedance, Transmission and Hybrid Parameters; Relationships between Parameter sets; Parallel Connection of Two-Port Networks.

I (11.1, 11.2, 11.3, 11.4, 11.5, 11.6, 11.7)

UNIT VII

SYNTHESIS OF ONE-PORT NETWORKS 07 hrs

Properties of L-C Immittance Functions; R-C Driving-Point Impedances; R-L Impedances and R-C Admittances; Synthesis of: L-C Driving-Point Immittances, R-C Impedances, R-L Admittances, R-L-C Functions.

II (11.1. to 11.6)

UNIT VIII

ELEMENTS OF TRANSFER FUNCTION SYNTHESIS 04 hrs

Properties of Transfer Functions; Zeros of Transmission; Synthesis of Y21 and Z21 with a 1-Ω Termination; Synthesis of Constant-Resistance Networks;

II (12.1, 12.2, 12.3, 12.4)

TOPICS IN FILTER DESIGN 04 hrs

The Approximation Problem in Network Theory; Maximally Flat and other Low-Pass Filter Approximations; Synthesis of Low-Pass Filters; Magnitude and Frequency Normalisation; Frequency Transformations.

II (13.2, 13.3, 13.4, 13.8, 13.9, 13.10)

Text Books:

I Network Analysis, M.E.Van Valkenberg, 3^rd Edition, Prentice-Hall India, EEE 2006.

II Network Analysis and Synthesis, Franklin F Kuo, 2^nd Edition, Wiley India Student Edition 2006.

Reference Book:

1. Circuits: Engineering Concepts and Analysis of Linear Electric Circuits, A. Bruce Carlson, Thomson Brooks / Cole, 2006.

Note: Students have to answer FIVE full questions out of EIGHT questions to be set from each unit carrying 16 marks.

AE60 INSTRUMENTATION AND MEASUREMENTS

UNIT I

MEASUREMENT FUNDAMENTALS 08 hrs

Significance of measurements; Methods of measurements; Instruments and measurement systems; mechanical, electrical and electronic instruments; classification of instruments.

Characteristics of Instruments; Static characteristics; Errors in Measurement; True value; Static Error; Static Correction; Scale Range and Scale Span; Error calibration; Accuracy and precision; Indication of Precision; Significant of figures; Linearity; Hysteresis; Threshold; Dead Time and Dead Zone; Resolution.

Limiting Errors; Relative Limiting Error; Combination of Quantity with Limiting Errors; Known and types of Errors; Gross errors; Systematic errors; Random errors.

Dynamic Characteristics of Instrument and measurement systems - Dynamic response; Dynamic Analysis; Time domain response; Response of a First and Second Order System to a Unit Step Input; Frequency responses of I and II order systems.

I (1.1 to 1.6, 2.1 to 2.9, 2.13 to 2.15, 2.18 to 2.23, 3.1 to 3.8, 4.1, 4.2, 4.17, 4.22, 4.26, 4.31, 4.33)

UNIT II

MEASUREMENT OF RESISTANCE, INDUCTANCE AND CAPACITANCE 08 hrs

Measurement Resistance - Classification of resistances, Measurement of Medium resistances - Wheatstone ’s bridge; Sensitivity and Limitations of Wheatstone’s Bridge; Measurement of Low resistance - Kelvin double bridge; Measurement of High resistance – Difficulties; Earth resistance measurement using Megger.

Measurement of Inductance – General form of an AC Bridge; Measurement of self Inductance using Anderson Bridge; Measurement of Capacitance using Schering bridge; High Voltage Schering bridge; Sources of Errors in bridge circuits; Precautions and techniques used for reducing errors.

I (14.1, 14.2, 14.2.3, 14.2.4, 14.2.8, 14.3.2, 14.4, 14.4.1, 14.5, 16.4, 16.5.4, 16.6.2, 16.6.3, 16.10, 16.10.1)

UNIT III

INSTRUMENTS TO MEASURE CURRENT AND VOLTAGES 07 hrs

Measurement of current by DC Ammeter; Multi range Ammeters; RF Ammeters; Limitations of Thermocouple; Effect of Frequency on Calibration; Measurement of very large currents by Thermocouple.

Measurement of voltage by DC Voltmeter; DC Voltmeter; Multi range AC voltmeter; Solid state Voltmeter; AC Voltmeter using Rectifier, Half-wave and Full Wave Rectifier;

Average and Peak responding voltmeter; True RMS voltmeter, Multimeter, Digital Multimeters.

II (3.1, 3.2, 3.6, 3.7, 3.8, 3.9, 4.2, 4.3, 4.4, 4.9, 4.12 to 4.14, 4.16 to 4.18, 4.25, 6.2)

UNIT IV

DIGITAL MEASURING INSTRUMENTS 07 hrs

Digital voltmeter – Dual slope Integrating type DVM; Integrated type DVM; Continuous balanced DVM; 3½ Digit; General specification of DVM.

Digital meter for measuring frequency and time; Counter – Universal, Decade, Electronics; Digital Tachometer; Digital pH meter; Digital Phase meter; Digital Capacitance meter.

Other measuring Instruments - Output power meter; Field strength meter; Phase meter; Q-Meter; Use of Lissajous figures for phase measurement.

II (5.3, 5.4, 5.7, 5.8, 5.10, 6.3 to 6.10, 6.12, 6.13, 10.2, 10.3, 10.5, 10.7)

UNIT V

SIGNAL GENERATORS AND OSCILLOSCOPE 08 hrs

Introduction; Basic Standard Signal Generator; Standard Signal Generator; Modern Laboratory signal Generator; AF Sine and Square wave generator; Function generator; Square and pulse generator; Standard specifications of a signal generator.

Oscilloscope – Basic Principle; CRT Features; Block diagram; Simple CRO; Vertical Amplifier; Deflecting system; Triggered CRO; Triggered Pulse Circuits; Delay Line in Triggered Sweep; Storage and Sampling Oscilloscope.

II (8.1, 8.4 to 8.9, 8.20, 7.1 to 7.10, 7.17, 7.18)

UNIT VI

SIGNAL ANALYSIS INSTRUMENTS AND R.F POWER MEASUREMENT TECHNIQUES 08 hrs

Wave Analyzers – Basic, Frequency Selective, Heterodyne Wave Analyzer, Harmonic Distortion and Spectrum Analyzer.

Bolometer method of power measurement; Bolometer Element and Mount; Measurement of Power by means of Bolometer Bridge; Unbalanced and Self Balancing Bolometer Bridge; Measurement of large amount of RF power; SWR measurement.

II (9.2, 9.4, 9.5, 9.6, 20.3 to 20.10, 20.12)

UNIT VII

RECORDERS 07 hrs

Objective and Requirement of Recording Data; Recorder Selection for Particular applications; Recorders – Strip chart, Galvanometer type, Null type, circular chart type, X-Y, Magnetic, Potentiometric type; Digital Data Recording; Recorder Specifications.

II (12.2 to 12.7, 12.9 to 12.13)

UNIT VIII

TRANSDUCERS AND DATA ACQUISITION SYSTEM 07 hrs

Electrical transducer; Selecting a Transducer; Resistive transducer; Resistive Position Transducer; Strain gauges; Resistance Thermometer; Thermistor; Inductive transducer, Differential output transducers; LVDT; Pressure Inductive; Capacitive Transducers; Load Cell; Temperature transducers, Flow measurement transducer; Mechanical Flowmeter.

Data Acquisition System – Objective of Data Acquisition System, Signal Conditioning of the inputs; Single and Multi Channel Data Acquisition System; Computer based DAS; A to D and D to A converters.

II (13.2 to 13.14, 13.20, 13.23 to 13.24, 17.1 to 17.7)

Text Books:

I. A Course in Electrical and Electronic Measurements and Instrumentation, A.K Sawhney, Dhanpat Rai & Co., New Delhi, 18^th Edition 2007.

II. Electronic Instrumentation, H.S Kalsi, Tata McGraw Hill, Second Edition 2004.

Reference Books:

1. Electronic Instrumentation and Measurement Techniques, W.D. Cooper and A.D Helfrick, Prentice Hall of India Pvt. Ltd., New Delhi

2. Electronic Instrumentation and Measurements, David A. Bell, Second Edition, PHI, 2007.

Note: Students have to answer FIVE full questions out of EIGHT questions to be set from each unit carrying 16 marks.

AE61 CONTROL ENGINEERING

UNIT I

MODELING OF SYSTEMS 07 hrs

The Control System; Servomechanisms; The Control Problem; Introduction to Mathematical Models; Differential Equations of Physical Systems; Transfer Functions; Illustrative Examples.

I (1.1, 1.2, 1.6, 2.1, 2.2, 2.4, 2.7)

UNIT II

BLOCK DIAGRAMS AND SIGNAL FLOW GRAPHS 07 hrs

Block Diagram Algebra; Signal Flow Graphs; Illustrative Examples.

I (2.5, 2.6, 2.7)

UNIT III

FEEDBACK CHARACTERISTICS OF CONTROL SYSTEMS 03 hrs

Feedback and Non-Feedback Systems; Reduction of Parameter Variations by Use of Feedback; Control Over System Dynamics by Use of Feedback; Control of the Effects of Disturbance Signals by Use of Feedback; Illustrative Examples.

I (3.1, 3.2, 3.3, 3.4, 3.7)

CONTROL SYSTEMS AND COMPONENTS 04 hrs

Introduction; Controller Components; Stepper Motors; Hydraulic Systems.

I (4.1, 4.3, 4.4, 4.5)

UNIT IV

TIME RESPONSE ANALYSIS 04 hrs

Introduction; Standard Test Signals; Time Response of First and Second-Order Systems; Steady-State Errors and Error Constants; Effect of Adding a Zero to a System; Design Specifications of Second-Order Systems; Illustrative Examples; State Variable Analysis-Laplace Transform Technique.

I (5.1, 5.2, 5.3, 5.4, 5.5, 5.6, 5.7, 5.10, 5.12)

CONCEPTS OF STABILITY 04 hrs

Concept of Stability; Necessary Conditions for stability; Hurwitz Stability Criteria; Routh Stability Criteria; Relative Stability Analysis; Stability of Systems Modeled in State Variable Form.

I (6.1, 6.2, 6.3, 6.4, 6.5, 6.7)

UNIT V

ROOT LOCUS TECHNIQUE 07 hrs

Introduction; Root Locus Concepts; Construction of FOOT LOCI; SYSTEMS with Transportation Lag; Sensitivity of Roots of Characteristic Equation.

I (7.1, 7.2, 7.3, 7.5, 7.6)

UNIT VI

FREQUENCY DOMAIN ANALYSIS 08 hrs

Introduction; Correlation Between Time and Frequency Response; Polar Plots; Bode Plots; All-Pass And Minimum-Phase Systems; Experimental Determination of Transfer Functions; Mathematical Preliminaries; Nyquist Stability Criterion; Assessment of Relative Stability; Closed Loop Frequency Response; Sensitivity Analysis in Frequency Domain.

I (8.1, 8.2, 8.3, 8.4, 8.5, 8.6, 9.1, 9.2, 9.3, 9.4, 9.5, 9.6)

UNIT VII

COMPENSATION 08 hrs

The Design Problem; Preliminary Considerations of Classical Design; Realization Of Basic Compensators; Cascade Compensation in Time and Frequency Domains; Tuning of PID Controllers; Feedback Compensation.

I (10.1, 10.2, 10.3, 10.4, 10.5, 10.6, 10.7)

UNIT VIII

STATE VARIABLE ANALYSIS 08 hrs

Introduction; Concepts of State, State Variables and State Model; State Models for Linear Continuous-Time Systems; Diagonalization; Solution of State Equations; Concepts of Controllability and Observability; Pole Placement by State Feedback; Liapunov’s Stability Criterion; Direct Method of Liapunov and Linear Systems.

I (12.1, 12.2, 12.3, 12.5, 12.6, 12.7, 12.8, 13.1, 13.2, 13.3)

Text Book:

I. Control Systems Engineering, ), I.J. Nagrath and M. Gopal, Fifth Edition (2007 New Age International Pvt. Ltd.

Reference Books:

1. Modern Control Engineering, D. Roy Choudhury, Prentice Hall India Pvt Ltd (2006)

2. Modern Control Engineering, K. Ogata, Pearson Education/Prentice-Hall of India Pvt. Ltd.

3. Schaum’s Outline of Theory and Problems of Feedback and Control Systems, Second Edition (2007), J. J. DiStefano, III, A.R. Stubberud and I. J. Williams, Tata McGraw-Hill Publishing Company Ltd.

4. Modern Control Systems, Tenth Edition (2007), Richard. C. Dorf and Robert. H. Bishop, Pearson Education.

5. Automatic Control Systems, B.C. Kuo, Prentice-Hall of India Pvt. Ltd.

Note: Students have to answer FIVE full questions out of EIGHT questions to be set from each unit carrying 16 marks.

AE92 DIGITAL ELECTRONICS LAB

List of Experiments

1. Study of Logic Gates: Truth-table verification of OR, AND, NOT, XOR, NAND and NOR gates; Realization of OR, AND, NOT and XOR functions using universal gates.

2. Half Adder / Full Adder: Realization using basic and XOR gates.

3. Half Subtractor / Full Subtractor: Realization using NAND gates.

4. Parallel Adder / Subtractor: Perform adder and subtractor operation using IC7483 chip.

5. 4-Bit Binary-to-Gray & Gray-to-Binary Code Converter: Realization using XOR gates.

6. 4-Bit and 8-Bit Comparator: Implementation using IC7485 magnitude comparator chips.

7. Multiplexer: Truth-table verification and realization of Half adder and Full adder using IC74153 chip.

8. Demultiplexer: Truth-table verification and realization of Half subtractor and Full subtractor using IC74139 chip.

9. LED Display: Use of BCD to 7 Segment decoder / driver chip to drive LED display.

10. Flip Flops: Truth-table verification of JK Master Slave FF, T-type and D-type FF using IC7476 chip.

11. Asynchronous Counter: Realization of 4-bit up counter and Mod-N counter using IC7490 & IC7493 chip.

12. Synchronous Counter: Realization of 4-bit up/down counter and Mod-N counter using IC74192 & IC74193 chip.

13. Shift Register: Study of shift right, SIPO, SISO, PIPO, PISO & Shift left operations using IC7495 chip.

14. Ring counter and Twisted Ring Counter: Realization using IC7495 chip.

15. RAM: Study of RAM (2K x 8 RAM) operation.

16. DAC Operation: Study of 8-bit DAC (IC 08/0800 chip), obtain staircase waveform using IC7493 chip.

Note:

· All the experiments can be performed using IC Trainer Kits.

· Minimum of 14 experiments to be conducted.

AE62 OPERATIONS RESEARCH & ENGINEERING MANAGEMENT

PART A: OPERATIONS RESEARCH

UNIT I

WHAT IS OPERATIONS RESEARCH? 02 hrs

Operations Research Models; Solving the OR Model; Queuing and Simulation Models; Art of Modeling; More Than Just Mathematics; Phases of an OR.

I (1.1 to 1.6)

MODELING WITH LINEAR PROGRAMMING 05 hrs

Two-Variable LP Model; Graphical LP Solution; Selected LP Applications.

I (2.1 to 2.3)

UNIT II

THE SIMPLEX METHOD AND SENSITIVITY ANALYSIS 05 hrs

LP Model in Equation Form; The Simplex Method; Artificial Starting Solution; Special Cases in Simplex Method.

I (3.1, 3.3, 3.4, 3.5.1, 3.5.2, 3.5.3, 3.5.4)

DUALITY AND POST-OPTIMAL ANALYSIS 03 hrs

Definition of the Dual Problem; Simplex Tableau Computations.

I (4.1, 4.2.4)

UNIT III

TRANSPORTATION MODEL AND ITS VARIANTS 07 hrs

Definition of the Transportation Model; Nontraditional Transportation Models; The Transportation Algorithm; The Assignment Model.

I (5.1, 5.2, 5.3, 5.4)

UNIT IV

NETWORK MODELS 08hrs

Scope and Definition of Network Models; Shortest-Route Problem; CPM and PERT.

I (6.1, 6.3, 6.5)

UNIT V

DECISION ANALYSIS AND GAMES 03 hrs

Game Theory - Optimal Solution of Two-Person Zero-Sum Games; Solution of Mixed Strategy Games.

I (13.4.1, 13.4.2)

QUEUING SYSTEMS 05 hrs

Why Study Queues?; Elements of a Queuing Model; Role of Exponential Distribution; Pure Birth and Death Models; Generalized Poisson Queuing Model; Specialized Poisson Queues.

I (15.1, 15.2, 15.3, 15.4, 15.5, 15.6, 15.6.1, 15.6.2, 15.6.3)

PART B: ENGINEERING MANAGEMENT

UNIT VI

INTRODUCTION TO ENGINEERING MANAGEMENT 03 hrs

What is Management; The History of Management; Types of Manager; Management Responsibilities; Management Tasks; The Engineering Manager.

II (2.1, 2.2, 2.3, 2.4, 2.5, 2.6)

THE ORGANIZATION 04 hrs

Defining the Organization; Organization Structures; The Quality Organization; Organizational Change; Managing Change.

II (3.1, 3.2, 3.3, 3.4, 3.5)

UNIT VII

STRATEGY FORMULATION 02 hrs

The Elements of Corporate Strategy; Strategy Formulation Process; Alliances and Acquisitions; Strategy Formulation Tools and Techniques.

II (5.1, 5.2, 5.3, 5.4)

DECISION MAKING 02 hrs

The Nature of Management Decision; Decision Making Process; Decision Making Techniques.

II (6.1, 6.2, 6.3)

INFORMATION PRESENTATION 01 hrs

Statistical Analysis; Presentation of Data.

II (7.1, 7.2)

FORECASTING MODELS FOR DECISION MAKING 03 hrs

Forecasting the Future; Qualitative Methods; The Time Series; Causal Models

II (9.1, 9.2, 9.3, 9.4)

UNIT VIII

MARKETS AND MARKETING 02 hrs

The Market; Marketing Information; Market Segmentation; Consumer and Industrial Markets.

II (15.1, 15.2, 15.3, 15.4)

PRODUCT MANAGEMENT, SALES AND DISTRIBUTION 02 hrs

Product Management; Pricing; Marketing Communications; Sales; Physical Distribution.

II (16.1, 16.2, 16.3, 16.4, 16.5)

MANAGEMENT SKILLS 02 hrs

The Nature of Leadership; Leadership Theories; Delegation; Defining Motivation; Motivational Theories; Defining Needs; Motivation Techniques.

II (17.1, 17.2, 17.3, 17.4, 17.5, 17.6, 17.7)

EFFECTIVE COMMUNICATIONS 01 hrs

Communication Process; Establish Communications; Presentation.

II (19.1, 19.2, 19.3)

Text Books:

I. Operations Research, An Introduction, Hamdy A. Taha, Eight Edition, PHI, 2007

II. Engineering Management, Fraidoon Mazda, Low Price Indian Edition, Addison-Wesley.

Reference Books:

1. Introduction to Operation Research, Hiller and Liberman, Fifth Edition, McGraw Hill Publications.

2. Operations Research, S.D. Sharma, Kedarnath, Ramnath & Co

3. Managing Engineering & Technology, Babcock & Morse, Pearson Education.

4. Management – A Competency Based Approach, Helriegel / Jackson / Slocum, 9^th Edition, Thomson South Western.

Note: Students have to answer FIVE full questions out of EIGHT questions to be set from each unit carrying 16 marks, selecting THREE questions from Part A and TWO from Part B.

AE63 ELECTROMAGNETICS AND RADIATION SYSTEMS

UNIT I

COULOMB’S LAW AND ELECTRIC FIELD INTENSITY 04 hrs

The Experimental law of Coulomb; Electric Field Intensity; Field Due to a Continuous Volume Charge Distribution; Field of a Line Charge; Field of a Sheet of Charge.

I (2.1 to 2.5)

ELECTRIC FLUX DENSITY, GAUSS’S LAW AND DIVERGENCE 04 hrs

Electric Flux Density; Gauss’s Law; Divergence; Maxwell’s First Equation (Electrostatics); The Vector Operator and the Divergence Theorem.

I (3.1, 3.2, 3.5, 3.6, 3.7)

UNIT II

ENERGY AND POTENTIAL 04 hrs

Energy Expended in Moving a Point Charge in an Electric Field; The Line Integral; Definition of Potential Difference and Potential; The Potential Field of a Point Charge; The Potential Field of a System of Charges: Conservative Property; Potential Gradient; Energy Density in the Electrostatic Field.

I (4.1 to 4.6, 4.8)

CURRENT AND CONDUCTORS, DIELECTRICS AND CAPACITANCE 04 hrs

Current and Current Density; Continuity of Current; Metallic Conductors; Conductor Properties and Boundary Conditions.

Boundary Conditions for Perfect Dielectric Materials; Capacitance; Examples.

I (5.1 to 5.4, 6.2 to 6.4)

UNIT III

POISSON’S AND LAPLACE’S EQUATIONS 07 hrs

Derivation of Poisson’s and Laplace’s Equations; Uniqueness Theorem; Examples of the Solution of Laplace’s Equation; Example of Solution of Poisson’s Equation; Product Solution of Laplace’s Equation.

I (7.1 to 7.5)

UNIT IV

THE STEADY MAGNETIC FIELD 07 hrs

Biot-Savart Law; Ampere’s Circuital Law; Curl; Stoke’s Theorem; Magnetic Flux and Magnetic Flux Density; The Scalar and Vector Magnetic Potentials.

I (8.1 to 8.6)

UNIT V

MAGNETIC FORCES, MATERIALS AND INDUCTANCE 08 hrs

Force on a Moving Charge; Force on a Differential Current Element; Force Between Differential Current Elements; Force and Torque on a Closed Circuit; Magnetization and Permeability; Magnetic Boundary Conditions; The Magnetic Circuit; Potential Energy and Forces on Magnetic Materials; Inductance and Mutual Inductance.

I (9.1 to 9.4, 9.6 to 9.10)

UNIT VI

TIME-VARYING FIELDS AND MAXWELL’S EQUATIONS 07 hrs

Faraday’s Law; Displacement Current; Maxwell’s Equations in Point Form; Maxwell’s Equations in Integral Form; The Retarded Potentials.

I (10.1 to 10.5)

UNIT VII

RADIATION AND PROPAGATION OF WAVES 03 hrs

Electromagnetic Radiation; Propagation of Waves.

II (8.1, 8.2)

ANTENNAS 04 hrs

Basic Considerations; Wire Radiators in Space.

II (9.1, 9.2)

UNIT VIII

ANTENNAS (CONTINUED) 08 hrs

Terms and Definitions; Effects of Ground on Antennas; Antenna Coupling at Medium Frequencies; Directional High-Frequency Antennas; UHF and Microwave Antennas; Wideband and Special-Purpose Antennas.

II (9.3, 9.4, 9.5, 9.6, 9.7, 9.8)

Text Books:

I. Engineering Electromagnetics, W. H. Hayt and J. A. Buck, Seventh Edition, Tata McGraw Hill, Special Indian Edition 2006.

II. Electronic Communication Systems, George Kennedy and Bernard Davis, Fourth Edition (1999), Tata McGraw Hill Publishing Company Ltd.

Reference Book:

1. Elements of Engineering Electromagnetics, Nannapaneni Narayana Rao, 6^th Edition, Pearson Education Low Price Edition.

Note: Students have to answer FIVE full questions out of EIGHT questions to be set from each unit carrying 16 marks.

AE64 TELECOMMUNICATION SWITCHING SYSTEMS

UNIT I

SWITCHING SYSTEMS 08 hrs

Evolution of Telecommunications; Basics of a Switching System; Functions of a Switching System; Strowger Switching Components; Step by step switching; Design parameters;100 Line Switching system;1000 line Blocking exchange;10,000 line exchange; Crossbar Switching-Principle of crossbar switching, crossbar switch configurations,crosspoint technology, crossbar exchange organization; A General Trunking; Electronic Switching; Reed Electronic Systems; Digital Switching Systems.

I (3.5, 3.10, 3.11, 3.12, 3.13); II (1.1, 1.3, 2.3, 2.4, 2.5, 2.6, 2.7, 2.8, 3.3, 3.4, 3.5, 3.6)

UNIT II

TELECOMMUNICATIONS TRAFFIC 08 hrs

Introduction; The Unit of Traffic; Congestion; Traffic Measurement; A Mathematical Model; Lost-Call Systems – Theory, Traffic Performance, Loss Systems in Tandem, Use of Traffic Tables; Queuing Systems – The Second Erlang Distribution, Probability of Delay, Finite Queue Capacity, Some other useful results, Systems with a Single Server, Queues in Tandem, Delay Tables, Applications of Delay Formulae.

I (4.1, 4.2, 4.3, 4.4, 4.5, 4.6, 4.7)

UNIT III

SWITCHING NETWORKS 08 hrs

Introduction; Single Stage Networks; Gradings-Principle, Design of Progressive Gradings, Other forms of Grading, Traffic Capacity of Gradings, Application of Gradings; Link Systems-General, Two Stage Networks, Three Stage Networks, Four Stage Networks, Discussion; Grades of Service of Link Systems; Application of Graph Theory to Link Systems; Three Stage Non-Blocking Networks.

I (5.1, 5.2, 5.3, 5.4, 5.5, 5.6); II (4.8)

UNIT IV

TIME DIVISION SWITCHING 07 hrs

Basic Time Division Space Switching; Basic Time Division Time Switching; Time Multiplexed Space Switching; Time Multiplexed Time Switching; Combination Switching; Three Stage Combination Switching; Grades of Service of Time Division Switching Networks.

II (6.1, 6.2, 6.3, 6.4, 6.5, 6.6); I (6.4)

UNIT V

CONTROL OF SWITCHING SYSTEMS 07 hrs

Introduction; Call Processing Functions:-Sequence of operations, Signal Exchanges; State Transition Diagrams; Common Control; Reliability, Availability and Security; Stored Program Control; Centralized SPC, Distributed SPC.

I (7.1, 7.2, 7.3, 7.4, 7.5); II (4.1, 4.2, 4.3)

UNIT VI

SIGNALLING 08 hrs

Introduction; Customer Line Signalling; Audio Frequency Junctions and Trunk Circuits; FDM Carrier Systems – Outband Signalling, Inband (VF) Signalling; PCM Signalling; Inter Register Signalling; Common Channel Signalling Principles – General, Signalling Networks; CCITT Signalling System Number 6; CCITT Signalling System Number 7; The High Level Data Link Control Protocol, Signal Units, The Signalling Information Field; Digital Customer Line Signalling.

I (8.1, 8.2, 8.3, 8.4, 8.5, 8.6, 8.7, 8.8, 8.9, 8.10)

UNIT VII

PACKET SWITCHING 07 hrs

Introduction; Statistical Multiplexing; Local Area and Wide Area Networks – Bus Networks, Ring Networks, Comparison of Bus and Ring Networks, Optical Fiber Networks; Large Scale Networks – General, Datagrams and Virtual Circuits, Routing, Flow Control, Standards, Frame Relay; Broadband Networks – General, The Asynchronous Transfer Mode, ATM Switches.

I (9.1, 9.2, 9.3, 9.4, 9.5)

UNIT VIII

NETWORKS 07 hrs

Introduction; Analog Networks; Integrated Digital Networks; Integrated Services Digital Networks; Cellular Radio Networks; Intelligent Networks; Private Networks; Numbering – National Schemes, International Numbering, Numbering Plans for the ISDN, Public Data Networks; Charging; Routing – General, Automatic Alternative Routing.

I (10.1, 10.2, 10.3, 10.4, 10.5, 10.6, 10.7, 10.8, 10.9, 10.10)

Text Books:

I. Telecommunications Switching, Traffic and Networks, J.E.Flood, Pearson Education- 2006.

II. Telecommunication Switching Systems and Networks, Thiagarajan Viswanathan, Prentice Hall of India Pvt. Ltd, 2007.

Reference Book:

1. Digital Telephony, John C Bellamy, John Wiley (International Student Edition).

Note: Students have to answer FIVE full questions out of EIGHT questions to be set from each unit carrying 16 marks.

AE65 ANALOG COMMUNICATIONS

UNIT I

INTRODUCTION TO COMMUNICATION SYSTEMS 03 hrs

Communications; Communication Systems; Modulation; Bandwidth Requirements.

I (1.1, 1.2, 1.3, 1.4)

NOISE 04 hrs

External Noise; Internal Noise; Noise Calculations; Noise Figure; Noise Temperature.

I (2.1, 2.2, 2.3, 2.4, 2.5)

UNIT II

AMPLITUDE MODULATION 04 hrs

Amplitude Modulation Theory; Generation of AM.

I (3.1, 3.2)

SINGLE-SIDEBAND TECHNIQUES 04 hrs

Evolution and Description of SSB; Suppression of Carrier; Suppression of Unwanted Sideband; Extensions of SSB.

I (4.1, 4.2, 4.3, 4.4)

UNIT III

FREQUENCY MODULATION 08hrs

Theory of Frequency and Phase Modulation; Noise and Frequency Modulation; Generation of Frequency Modulation.

I (5.1, 5.2, 5.3)

UNIT IV

RADIO RECEIVERS 08 hrs

Receiver Types; AM Receivers; FM Receivers; Single and Independent Sideband Receivers.

I (6.1, 6.2, 6.4, 6.5)

UNIT V

TRANSMISSION LINES 07 hrs

Basic principles; The Smith Chart and its Applications; Transmission-line components.

I (7.1, 7.2, 7.3)

UNIT VI

WAVEGUIDES, RESONATORS AND COMPONENTS 08 hrs

Rectangular Waveguides; Circular and Other Waveguides; Waveguide Coupling, Matching and Attenuation; Cavity resonators; Auxiliary components.

I (10.1, 10.2, 10.3, 10.4, 10.5)

UNIT VII

PULSE COMMUNICATIONS 07 hrs

Information Theory; Pulse Modulation; Pulse Systems.

I (13.1, 13.2, 13.3)

UNIT VIII

BROADBAND AND COMMUNICATIONS SYSTEMS 07hrs

Multiplexing; Short and Medium-Haul Systems; Long-Haul Systems; Elements of Long-Distance Telephony.

I (15.1, 15.2, 15.3, 15.4)

Text Book:

I. Electronic Communication Systems, George Kennedy and Bernard Davis, Fourth Edition (1999), Tata McGraw Hill Publishing Company Ltd.

Reference Books:

1. Communication Systems, 3^rd Edition, Simon Haykin, John Wiley & Sons.

2. Telecommunications Principles Circuits Systems and Experiments, S. Ramabhadran, Khanna Publishers, Sixth Edition.

Note: Students have to answer FIVE full questions out of EIGHT questions to be set from each unit carrying 16 marks.

AE66 MICROPROCESSORS & MICROCONTROLLERS

UNIT I

INTRODUCTION TO MICROPROCESSORS 08 hrs

Evolution of Microprocessors, Fundamentals of a Computer, Number Representation – Unsigned binary integers, Signed binary integers; Fundamentals of Microprocessor – description of 8085 pins, Programmer’s view of 8085, Registers A, B, C, D, E, H and L

First Assembly Language Program; Instruction set of 8085 – Data transfer group, Arithmetic group, Logical group, NOP and Stack group of instructions

I (1, 2, 3.1, 3.2, 4.2, 4.3, 4.4, 4.5, 5, 6, 7, 8, 9)

UNIT II

INTRODUCTION TO MICROPROCESSORS (CONTD) 08 hrs

Instruction set of 8085 continued – Branch group, Chip select logic, Addressing of I/O ports, Architecture of 8085 – Details of 8085 architecture, Instruction cycle, Comparison of different machine cycles

I (10, 11, 12, 13.1, 13.2, 13.3)

UNIT III

ASSEMBLY LANGUAGE PROGRAMS 07 hrs

Exchange 10 bytes, Add 2 multibyte numbers, Add 2 multibyte BCD numbers, Block movement without overlap, Monitor routines, Multiply two numbers

Linear search, Find the smallest number, HCF of two numbers, Convert BCD to binary, Convert binary to BCD

I (14.1 to 14.4, 14.6.1, 16.1, 16.2, 16.3, 16.7.1, 16.7.2, 16.8.1, 16.8.2)

UNIT IV

INTERRUPTS IN 8085 07 hrs

Data transfer schemes, 8085 interrupts, EI and DI instructions, INTR and INTA* pins, RST 5.5, RST 6.5, RST 7.5, and TRAP pins, SIM and RIM instructions, 8255 Programmable peripheral interface chip Description of 8255, Operational modes, Control port of 8255

I (18.1 to 18.7, 18.9, 20.1 to 20.3)

UNIT V

PROGRAMS USING INTERFACE MODULES 07 hrs

Logic controller interface, Evaluation of Boolean expression, Decimal counter, Simulation of 4-bit ALU, Interfacing of I/O devices.

Interfacing of 7-segment display, Interfacing simple keyboard, Interfacing a matrix keyboard, Intel 8279 Keyboard and Display controller

I (21.1.1, 21.1.3, 21.1.4, 22.1, 22.3, 22.4, 22.6)

UNIT VI

INTEL 8259A- PROGRAMMABLE INTERRUPT CONTROLLER 08 hrs

Need for interrupt controller, Overview of 8259, Pins of 8259, Registers of 8259, Programming with no slaves – ICW1, ICW2, ICW3, ICW4, OCW1

Intel 8257 – Programmable DMA controller

Concept of DMA, Need for DMA, Description of 8257, Programming the 8257, Pins of 8257, Working of 8257

I (23.1 to 23.4, 23.5.1 to 23.5.5, 24.1 to 24.6)

UNIT VII

INTEL 8253 – PROGRAMMABLE INTERVAL TIMER 08 hrs

Need for programmable interval timer, Description of 8253, Programming the 8253, Mode 0, Mode 1, Mode 3 operations

Intel 8251A – Universal synchronous asynchronous receiver transmitter

Need for USART, Asynchronous transmission, Asynchronous reception, Synchronous transmission, Synchronous reception, Pin description of 8251, Programming the 8251

I (25.1 to 25.5, 25.7, 26.1 to 26.7)

UNIT VIII

8051 MICROCONTROLLER 07 hrs

Main features, Functional blocks, Program memory structure, Data memory structure, Programmer’s view, Addressing modes, Instruction set, Programming examples

I (29)

Text Book:

I. The 8085 Microprocessor; Architecture, Programming and Interfacing, K. Udaya Kumar and B. S. Umashankar, Pearson Education, 2008

Reference Books:

1. Microprocessor Architecture, Programming and Applications with the 8085, Fourth Edition, R. S. Gaonkar, Penram International Publishing (India), 2000

2. The 8051 Microcontroller and Embedded Systems, Muhammad Ali Mazidi, Janice Gillispie Mazidi, Rolin D. McKinlay, Second Edition, Pearson Education, 2008

Note: Students have to answer FIVE full questions out of EIGHT questions to be set from each unit carrying 16 marks.

AE93 µP & C PROGRAMMING LAB

List of Experiments

1. Write an 8085 assembly language program to exchange 10 bytes of data stored from location X with 10 bytes of data stored from location Y.

2. Write an 8085 assembly language program to add 2 multibyte BCD numbers. The numbers are stored from locations X and Y in byte reversal form. The size in bytes of the multi-byte BCD numbers is given in the location, SIZE. The result is to be stored from location Z in byte reversal form, using one byte more than the size of multi-byte numbers.

3. Write an 8085 assembly language program to multiply two 8-bit numbers stored at locations X and Y. Store the 16-bit result in locations Z and Z+1. Also display the result in the address field of the microprocessor kit.

4. Write an 8085 assembly language program to search for a given byte in an array of bytes using Linear search algorithm. Location X contains the size of the array and location X+1 contains the element to be searched. The elements of the array are stored from location Y onwards. The program should display in the address field, the search element and the position where it was found. If the search element is not found, the position should be indicated as 00.

5. Write an 8085 assembly language program to find the smallest of N one-byte numbers. The N value is provided at location X and the numbers are present from location X+1. Display the smallest number in the data field, and its location in the address field.

6. Write an 8085 assembly language program to find the HCF of two 8-bit numbers. The numbers are stored at locations X and Y. Display the numbers in the address field and their HCF in the data field.

7. Write an 8085 assembly language program to convert an 8-bit binary number to equivalent BCD number. The binary number is at location X. Display the binary (hex) number in the data field and its equivalent BCD number in the address field.

8. Write a C program to find the number of and sum of all integers greater than 100 and less than 200 that are divisible by a given integer x.

9. Given a number, write a C program using while loop to reverse the digits of the number. For e.g., the number 12345 should be printed as 54321.

10. Write a C program to read n numbers into an array, and compute the mean, variance and standard deviation of these numbers.

11. Write a C program using recursive calls to evaluate f(x) = x – x³/3! + x⁵/5! - x⁷/7! + …

12. Write a C program to read in an array of names and to sort them in alphabetical order.

13. Write a C program to sort a sequence of n integers using Quick sort technique and then search for a key in the sorted array using Binary search technique.

14. Write an interactive C program to create a linear linked list of customer names and their telephone numbers. The program should be menu-driven and include features for adding a new customer, deleting an existing customer and for displaying the list of all customers.

15. Write a C program to implement a queue in which insertions, deletions and display can be performed.

Note:

· All the 8085 Assembly Language Programs have to be manually assembled and executed on a 8085 Microprocessor kit.

· All the C programs have to be executed using Turbo C or similar environment.

· Minimum of 13 experiments to be conducted.

AE67 DIGITAL COMMUNICATIONS

UNIT I

INTRODUCTION 02 hrs

Sources and Signals; Basic Signal Processing Operations in Digital Communication; Channels for Digital Communications.

I (1.1, 1.2, 1.3)

FUNDAMENTAL LIMITS ON PERFORMANCE 05 hrs

Uncertainty, Information and Entropy; Source Coding Theorem; Huffman Coding; Discrete Memoryless Channels; Mutual Information; Channel Capacity; Channel Coding Theorem; Channel Capacity Theorem.

I (2.1, 2.2, 2.3, 2.4, 2.5, 2.6, 2.7, 2.9)

UNIT II

SAMPLING PROCESS 07 hrs

Sampling Theorem; Quadrature Sampling of BP Signal; Reconstruction of a Message Process from its Samples, Signal Distortion in Sampling; Practical Aspects of Sampling and Signal Recovery; Pulse Amplitude Modulation; Time Division Multiplexing.

I (4.1, 4.2, 4.3, 4.4, 4.5, 4.6, 4.7)

UNIT III

WAVEFORM CODING TECHNIQUES 08 hrs

Pulse Code Modulation; Channel Noise and Error Probability; Quantization Noise and Signal to Noise Ratio; Robust Quantization; Differential PCM; Delta Modulation; Coding Speech at Low Bit Rates.

I (5.1, 5.2, 5.3, 5.4, 5.5, 5.6, 5.7)

UNIT IV

BASE-BAND SHAPING FOR DATA TRANSMISSION 08 hrs

Discrete PAM Signals; Power Spectra of Discrete PAM Signals; Inter Symbol Interference; Nyquist’s Criterion for Distortionless Base-Band Binary Transmission; Correlative Coding; Eye Pattern; Baseband M-ary PAM Systems; Adaptive Equalization for Data Transmission.

I (6.1, 6.2, 6.3, 6.4, 6.5, 6.6, 6.7, 6.8)

UNIT V

DIGITAL MODULATION TECHNIQUES 08 hrs

Digital Modulation Formats; Coherent Binary Modulation Techniques; Coherent Quadrature Modulation Techniques; Non-Coherent Binary Modulation Techniques; Comparison of Binary and Quaternary Modulation Techniques; M-ary Modulation Techniques; Effect of Inter Symbol Interference; Bit versus Symbol Error Probabilities; Synchronization.

I (7.1, 7.2, 7.3, 7.4, 7.5, 7.6, 7.10, 7.11, 7.12)

UNIT VI

DETECTION AND ESTIMATION 07 hrs

Gram-Schmidt Orthogonalization Procedure; Geometric Interpretation of Signals;

Response of Bank of Correlators to Noisy Input; Detection of Known Signals in Noise; Probability of Error; Correlation Receiver; Matched Filter Receiver; Detection of Signals with Unknown Phase in Noise; Estimation: Concept and Criteria; Maximum Likelihood Estimation.

I (3.2, 3.3, 3.4, 3.5, 3.6, 3.7, 3.8, 3.9, 3.10, 3.11)

UNIT VII

SPREAD SPECTRUM MODULATION 08 hrs

Pseudo Noise Sequences; Notion of spread spectrum; direct sequence spread Coherent binary PSK; Signal Space Dimentionality and Processing Gain; Probability of Error; Frequency Hop Spread Spectrum.

I (9.1, 9.2, 9.3, 9.4, 9.5, 9.6)

UNIT VIII

APPLICATIONS 07 hrs

Applications of Waveform Coding Techniques; Applications of Digital Modulation Techniques; Applications of Spread Spectrum Modulation.

I (5.8, 7.13, 9.7)

Text Book:

I Digital communications, Wiley Student Edition, Simon Haykin

Reference Books:

1 Digital and Analog communication systems, K. Sam Shanmugham, John Wiley.

2 An Introduction to Analog and Digital Communication, Simon Haykin, John Wiley.

Note: Students have to answer FIVE full questions out of EIGHT questions to be set from each unit carrying 16 marks.

AE68 EMBEDDED SYSTEMS DESIGN

UNIT I

INTRODUCTION TO EMBEDDED SYSTEMS 04 hrs

Embedded Systems Overview; Design Challenge; Processor Technology; IC Technology; Design Technology; Trade-Offs.

I (1.1, 1.2, 1.3, 1.4, 1.5, 1.6)

CUSTOM SINGLE PURPOSE PROCESSORS: HARDWARE 04 hrs

Introduction; Combinational Logic; Sequential Logic; Custom Single Purpose Processor Design; Rt-Level Custom Single Purpose Processor Design; Optimizing Custom Single Purpose Processors.

I (2.1, 2.2, 2.3, 2.4, 2.5, 2.6)

UNIT II

GENERAL PURPOSE PROCESSORS: SOFTWARE 07 hrs

Introduction; Basic Architecture; Operation; Programmer’s View; Development Environment; ASIPs; Selecting a Microprocessor; General Purpose Processor Design

I (3.1, 3.2, 3.3, 3.4, 3.5, 3.6, 3.7, 3.8)

UNIT III

STANDARD SINGLE-PURPOSE PROCESSORS: PERIPHERALS 07 hrs

Introduction; Timers, counters And Watchdog Timer; UART; Pulse Width Modulators; LCD Controllers; Keypad Controllers; Stepper Motor Controllers; Analog to Digital Converters; Real Time Clock.

I (4.1, 4.2, 4.3, 4.4, 4.5, 4.6, 4.7, 4.8, 4.9)

UNIT IV

MEMORY 07 hrs

Introduction; Memory Write Ability and Storage Permanence; Common Memory Types; Composing Memory; Memory Hierarchy and Cache; Advanced RAM.

I (5.1, 5.2, 5.3, 5.4, 5.5, 5.6)

UNIT V

INTERFACING 08 hrs

Introduction, Communication Basics; Microprocessor Interfacing: I/O Addressing; Microprocessor Interfacing: Interrupts; Microprocessor Interfacing: Direct Memory Access; Arbitration; Multilevel Bus Architecture; Advance Communication Principles; Serial Protocols; Parallel Protocols; Wireless Protocols.

I (6.1, 6.2, 6.3, 6.4, 6.5, 6.6, 6.7, 6.8, 6.9, 6.10, 6.11)

UNIT VI

INTRODUCTION TO REAL TIME OPERATING SYSTEMS 08 hrs

Tasks and Task States; Tasks and Data; Semaphores and Shared Data.

II (6.1, 6.2, 6.3)

UNIT VII

MORE OPERATING SYSTEMS SERVICES 08 hrs

Message Queues, Mail Boxes and Pipes; Timer Functions; Events; Memory Management; Interrupt Routines in An RTOS Environment.

II (7.1, 7.2, 7.3, 7.4, 7.5)

UNIT VIII

BASIC DESIGN USING REAL TIME OPERATING SYSTEMS 07 hrs

Overview; Principles; An Example; Encapsulating Semaphores and Queues; Hard Real Time Scheduling Consideration; Saving Memory Space; Saving Power.

II (8.1, 8.2, 8.3, 8.4, 8.5, 8.6, 8.7)

Text Books:

I. Embedded System Design, A Unified Hardware/Software Introduction, Frank Vahid / Tony Givargis, 2006 reprint, John Wiley Student Edition.

II. An Embedded Software Primer, David .E. Simon, Fourth Impression 2007, Pearson Education.

Reference Books:

1 Embedded Systems, Raj Kamal, 13^th reprint 2007, Tata-McGrawHill Publications.

Embedded Microcomputer Systems, Valvano, Thomson.

Note: Students have to answer FIVE full questions out of EIGHT questions to be set from each unit carrying 16 marks.

AE71 DATA COMMUNICATION AND COMPUTER NETWORKS

UNIT I

DATA COMMUNICATIONS, DATA NETWORKING, AND THE INTERNET 04 hrs

Data Communications and Networking for Today's Enterprise; A Communications Model; Data Communications; Networks; The Internet.

I (1.1, 1.2, 1.3, 1.4, 1.5)

PROTOCOL ARCHITECTURE, TCP/IP, AND INTERNET-BASED APPLICATIONS 03 hrs

The Need for a Protocol Architecture; The TCP/IP Protocol Architecture; the OSI Model; Standardization within a Protocol Architecture.

I (2.1, 2.2, 2.3, 2.4)

UNIT II

DATA TRANSMISSION 05 hrs

Concepts and Terminology; Analog and Digital Data Transmission; Transmission Impairments; Channel Capacity.

I (3.1, 3.2, 3.3, 3.4)

TRANSMISSION MEDIA 03 hrs
Guided Transmission Media; Wireless Transmission.

I (4.1, 4.2)

UNIT III

SIGNAL ENCODING TECHNIQUES 05 hrs

Digital Data, Digital Signals; Digital Data, Analog Signals; Analog Data, Digital Signals; Analog Data, Analog Signals.

I (5.1, 5.2, 5.3, 5.4)

DIGITAL DATA COMMUNICATION TECHNIQUES 03 hrs

Asynchronous and Synchronous Transmission; Types of Errors; Error Detection; Line Configurations.

I (6.1, 6.2, 6.3, 6.5)

UNIT IV

DATA LINK CONTROL PROTOCOLS 03 hrs

Flow Control; Error Control; High-Level Data Link Control (HDLC).

I (7.1, 7.2, 7.3)

MULTIPLEXING 04 hrs

Frequency-Division Multiplexing; Synchronous Time-Division Multiplexing; Statistical Time-Division Multiplexing.

I (8.1, 8.2, 8.3)

UNIT V

CIRCUIT SWITCHING AND PACKET SWITCHING 02 hrs

Switched Communications Networks; Circuit Switching Networks; Packet-Switching Principles.

I (10.1, 10.2, 10.5)

ROUTING IN SWITCHED NETWORKS 03 hrs

Routing in Packet-Switching Networks; Least-Cost Algorithms.

I (12.1, 12.3)

CONGESTION CONTROL IN DATA NETWORKS 2 hrs

Effects of Congestion; Congestion Control; Traffic Management; Congestion Control in Packet-Switching Networks.

I (13.1, 13.2, 13.3, 13.4)

UNIT VI

LOCAL AREA NETWORK OVERVIEW 04 hrs

Background; Topologies and Transmission Media; LAN Protocol Architecture; Bridges

I (15.1, 15.2, 15.3, 15.4)

HIGH-SPEED LANS 02 hrs

The Emergence of High-Speed LANs; Ethernet.

I (16.1, 16.2)

WIRELESS LANS 02 hrs

Overview; Wireless LAN Technology; IEEE 802.11 Architecture and Services.

I (17.1, 17.2, 17.3)

UNIT VII

INTERNETWORK PROTOCOLS 07 hrs

Basic Protocol Functions; Principles of Internetworking; Internet Protocol Operation; Internet Protocol; IPv6.

I (18.1, 18.2, 18.3, 18.4, 18.5)

UNIT VIII

INTERNETWORK OPERATION 03 hrs

Multicasting; Routing Protocols.

I (19.1, 19.2)

TRANSPORT PROTOCOLS 02 hrs

TCP; UDP.

I (20.2, 20.4)

INTERNET APPLICATIONS 03 hrs

Electronic Mail: SMTP and MIME; Internet Directory Service: DNS.

I (22.1, 23.1)

Text Book:

I Data and Computer Communications, Eight Edition (2007), William Stallings, Pearson Education Low Price Edition.

Reference Book:

1 Data Communications and Networking, Fourth Edition (2006), Behrouz A. Forouzan, Tata McGraw-Hill Special Indian Edition.

Note: Students have to answer FIVE full questions out of EIGHT questions to be set from each unit carrying 16 marks.

AE72 MICROWAVE THEORY & TECHNIQUES

UNIT I

INTRODUCTION TO MICROWAVES AND MICROWAVE TRANSMISSION LINES 08 hrs

Microwave frequencies, Introduction, Microwave transmission line equations and solutions. Reflection and Transmission coefficients. Standing Wave and SWR. Line impedance and admittance. Smith Chart. Impedance matching – Single Stub matching.

Double Stub matching, Microwave co-axial connectors.

I (0.1, 3.0, 3.1, 3.2, 3.3, 3.4, 3.5, 3.6, 3.7)

UNIT II

MICROWAVE WAVEGUIDES 08 hrs

Introduction, Rectangular waveguides – Solution of Wave Equations in Rectangular waveguides. TE modes in Rectangular Waveguides. TM modes in Rectangular Waveguides, Power Transmission in Rectangular Waveguides. Power losses in Rectangular Waveguides, Excitation of modes in Rectangular Waveguides, Circular Waveguides - Solution of Wave Equations in Cylindrical Coordinates, TE and TM modes in Circular Waveguides, TEM modes in Circular Waveguides, Power Transmission in Circular Waveguides. Power losses in Circular Waveguides, Excitation of modes in Circular Waveguides.

I (4.0, 4.1, 4.1.1., 4.1.2., 4.1.3, 4.1.4, 4.1.5, 4.1.6, 4.2, 4.2.1, 4.2.2, 4.2.3, 4.2.4, 4.2.5, 4.2.6, 4.2.7)

UNIT III

MICROWAVE COMPONENTS 07 hrs

Microwave cavities – Rectangular and Circular Cavity Resonators. Semi-circular Cavity Resonators, Q-factor of a Cavity Resonators. Microwave Hybrid Circuits –Waveguide Tees and Scattering Matrices. Magic Tee and Hybrid Rings (Rat-race circuits) and their Scattering matrices. Waveguide Corners, Bends and Twists, Directional couplers. Two-hole Directional Couplers, S-matrix of a Directional Coupler. Circulators and Isolators.

I (4.3, 4.3.1, 4.3.2, 4.3.3, 4.4, 4.4.1, 4.4.2, 4.4.3, 4.4.4, 4.5, 4.5.1, 4.5.2, 4.6, 4.6.1, 4.6.2)

UNIT IV

MICROWAVE SOLID-STATE DEVICES 08 hrs

Microwave Tunnel Diodes – Principle of operation and Characteristics. Transferred Electron Devices (TEDs); Introduction; Gunn-Effect Devices, Background, Gunn Effect- Differential Negative Resistance. High-Field Domain, Modes of operation – Gunn, LSA and Stable amplification modes, Microwave generation and amplification.Avalanche Transit-Time Devices – Introduction, Read Diode, Physical Description, Avalanche Multiplication. IMPATT Diodes – Physical Structure, Negative Resistance TRAPATT Diodes - Physical Structure, Principle of operation, BARITT Devices- Physical Description, Principle of operation, Microwave Performance. Parametric Devices – Non-linear Reactance and Manley-Rowe Power Relations. Parametric Amplifiers and Applications

I ( 5.3, 5.3.1, 5.3.2, 7.0, 7.1, 7.1.1, 7.1.2, 7.2.1, 7.2.3, 7.3, 7.3.2, 7.3.3, 7.3.4, 7.7, 7.7.1, 7.7.2, 8.0, 8.1.1, 8.1.2, 8.2, 8.2.1, 8.2.2, 8.3, 8.3.1, 8.3.2, 8.4, 8.4.1, 8.4.2, 8.4.3, 8.5, 8.5.1, 8.5.2, 8.5.3, 8.5.4)

UNIT V

MICROWAVE LINEAR-BEAM TUBES (O-TYPE) 08 hrs

Introduction – High frequency limitations of conventional vacuum tubes – Lead- inductance and interelectrode-capacitance effects – Transit-angle effects and GBW Limitation. KLYSTRONS – Reentrant cavities, Velocity-modulation process, Bunching process. Output Power and Beam-loading, Efficiency and Mutual Conductance of Klystron amplifier, Power required to bunch electron beam. Multi-cavity Klystron amplifier, Beam current density, Output Current and output power of Two-cavity Klystron. Reflex Klystron Oscillator – Velocity Modulation, Power output and

efficiency, Electronic Admittance. Helix Traveling Tubes (TWTs), Slow-Wave Structures, Amplification Process, Convention Current. Axial Electric Field, Wave modes and Gain Consideration.

I (9.0, 9.1, 9.1.1, 9.1.2, 9.1.3, 9.2, 9.2.1, 9.2.2, 9.2.3, 9.2.4, 9.3, 9.3.1, 9.3.2, 9.4, 9.4.1, 9.4.2, 9.4.3, 9.5, 9.5.1, 9.5.2, 9.5.3, 9.5.4, 9.5.5, 9.5.6)

UNIT VI

MICROWAVE CROSS-FIELD TUBES (M- TYPE) 07 hrs

Introduction – Magnetron Oscillator, Cylindrical Magnetron (8-Cavity ), Equations of electron motion, Cyclotron angular frequency, Power output and efficiency, Linear Magnetron, Hartree condition, Co-axial Magnetron, Forward-Wave Cross-Field Amplifier, Principle of operation, Microwave characteristics. Backward-Wave Cross-field Amplifier (Amplitron), Backward-Wave Cross-field Oscillator (Carcinotron)- Linear and circular M-Carcinotrons

I (10.0, 10.1.1, 10.1.2, 10.1.3, 10.2, 10.2.1, 10.2.2, 10.3, 10.4)

UNIT VII

STRIP LINES AND MICROSTRIP LINES 07 hrs

Introduction, Microstrip Lines, Effective dielectric constant, Transformation of a rectangular conductor into an equivalent circular conductor, Characteristic impedance equation. Losses in microstrip Lines, Dielectric, Ohmic and radiation losses. Quality Factor Q of Microstrip Lines, Parallel striplines Distributed Parameters, Characteristic Impedance, Attenuation Losses. Coplanar strip lines, Shielded Strip Lines

I (11.1, 11.1.1, 11.1.2, 11.1.3, 11.2, 11.2.1, 11.2.2, 11.2.3, 11.3, 11.4)

UNIT VIII

MONOLITHIC MICROWAVE INTEGRATED CIRCUITS 07 hrs

Introduction – comparison between discrete circuit, integrated circuit and microwave integrated circuit, Advantages of MICs, Materials, Substrate Materials, Conductor Materials, Dielectric Materials and Resistive Materials, Monolithic Microwave Integrated-circuit Growth, MMIC Fabrication Techniques-Diffusion and ion implantation, Oxidation and film deposition, Epitaxial growth, Lithography, Etching and photoresist, Deposition, Vacuum Evaporation, Electron-Beam Evaporation and DC sputtering, Fabrication Example. Thin-film Formation – Planar resistor Film, Planar Inductor Film. .Planar Capacitor Film, Hybrid IC Fabrication – Plate-through technique and Etchback technique

I (12.0, 12.1, 12.1.1, 12.1.2, 12.1.3, 12.1.4, 12.2, 12.2.1, 12.2.2, 12.4, 12.4.1, 12.4.2, 12.4.3, 12.5)

Text Book:

I Microwave Devices and Circuits, Samuel Y. Liao, 3^rd Edition, Prentice-Hall of India, New Delhi, 2006.

Reference Books:

1 Foundations of Microwave Engineering, R.E. Collin, McGraw Hill

2 Microwave Engineering and Applications, Om. P. Gandhi , Maxwell McMillan International Edition.

Note: Students have to answer FIVE full questions out of EIGHT questions to be set from each unit carrying 16 marks.

AE73 NFORMATION THEORY AND CODING

UNIT I

RANDOM SIGNAL THEORY 7 hrs

Introduction, Introduction to Probabilities, Definitions, Probabilities of Random Events, Joint and Conditional Probabilities, Discrete Random Variables, Probability Mass Functions, Statistical Averages, Examples of Probability Mass Functions.

I (3.1, 3.2, 3.2.1, 3.2.2, 3.2.3, 3.3, 3.3.1, 3.3.2, 3.3.3)

UNIT II

RANDOM SIGNAL THEORY (CONTINUED) 07 hrs

Continuous Random Variables, Probability Density Functions and Statistical Averages, Examples of Probability Density Functions, Transformation of Random Variables, Random Processes, Definitions and Notations, Stationarity, Time Averages and Ergodicity.

I (3.4, 3.4.1, 3.4.2, 3.4.3, 3.5, 3.5.1, 3.5.2)

UNIT III

BASICS OF INFORMATION THEORY 08 hrs

Introduction, Measure of Information, Information content of a Message, Average Information Content (Entropy) of Symbols in Long Independent Sequences, Average Information Content of Symbols in Long Dependent Sequences, Markoff Statistical Model for Information Sources, Entropy and Information Rate of Markoff Sources.

I (4.1, 4.2, 4.2.1, 4.2.2, 4.2.3, 4.2.4, 4.2.5)

UNIT IV

FUNDAMENTAL LIMITS ON PERFORMANCE & SOURCE CODING 08 hrs

Uncertainty, Information and Entropy – Some Properties of Entropy, Extension of a Discrete Memoryless Source, Encoding of Source Output, Shannon’s Encoding Algorithm, Source Coding Theorem, Prefix Coding, Huffman Coding.

I (4.3, 4.3.1); II (2.1, 2.2, 2.3)

UNIT V

DISCRETE MEMORYLESS CHANNELS 08 hrs

Communication Channels, Discrete Communication Channels, Rate of information trammission over a discrete channel, Capacity of Discrete Memoryless Channels, Discrete Memoryless Channels, Mutual Information, Properties of Mutual Information, Channel Capacity, Channel Coding Theorem, Application of the Channel Coding Theorem to Binary Symmetric Channels.

I (4.4, 4.5, 4.5.1, 4.5.2); II (2.4, 2.5, 2.6, 2.7)

UNIT VI

CONTINUOUS CHANNELS 07 hrs

Continuous Channels, Shannon-Hartley Theorem and Its Implications; Differential Entropy and Mutual Information for Continuous Ensembles, Mutual Information, Channel Capacity Theorem, Ideal System.

I (4.6, 4.6.1); II (2.8, 2.9)

UNIT VII

ERROR CONTROL CODING – LINEAR BLOCK CODES 07 hrs

Introduction, Example of Error Control Coding, Methods of controlling errors, Types of Errors, Types of Codes, Linear Block Codes, Matrix Description of Linear Block Codes, Error Detection and Error Correction Capabilities of Linear Block Codes, Single Error-Correcting Hamming Codes, Table Lookup Decoding Using Standard Array, rationale, for coding and types of coding, discrete memoryless channels, linear block codes.

I (9.1, 9.1.1, 9.1.2, 9.1.3, 9.1.4, 9.2, 9.2.1, 9.2.2, 9.2.3, 9.2.4); II (8.1, 8.2, 8.3)

UNIT VIII

ERROR CONTROL CODING – CYCLIC AND CONVOLUTIONAL CODES 08 hrs

Binary Cyclic codes, Algebraic Structure of Cyclic Codes, Generator and Parity-Check Polynomials, Encoding using an (n-k) Bit Shift Register, Syndrome Calculation, Error Detection and Error Correction, Special Classes of Cyclic Codes- Bose-Chaudhuri-Hocquenghem ( BCH ) Codes, Burst-Error-Correcting Codes, Burst- and Random-Error-Correcting Codes. Convolutional Codes, Time-domain Approach, Transform-Domain Approach, Encoders of Convolutional Codes, Decoders of Convolutional Codes, Performance of Convolutional Codes, Code Tree, Trellis and State Diagram, Maximum Likelihood Decoding of Convolutional Codes – Viterbi Algorithm.

I (9.3, 9.3.1, 9.3.2, 9.3.3, 9.3.4, 9.4, 9.5, 9.6, 9.6.1, 9.6.2); II (8.4, 8.5, 8.6)

Text Books:

I Digital and Analog Communication Systems by K. Sam Shanmugam, John Wiley India Edition, 2007 reprint.

II Digital Communications by Simon Haykin, John Wiley & Sons, Student Edition.

Reference Book:

1 Digital Communication Fundamentals and Applications – Bernard Sklar, 2^nd Edition, Pearson Education.

Note: Students have to answer FIVE full questions out of EIGHT questions to be set from each unit carrying 16 marks.

AE74 VLSI DESIGN

UNIT I

A REVIEW OF MICROELECTRONICS AND AN INTRODUCTION TO MOS TECHNOLOGY 07 hrs

Introduction to Integrated Circuit Technology; The Integrated Circuit (IC) Era; Metal-Oxide-Semiconductor (MOS) and Related VLSI Technology; Basic MOS Transistors; Enhancement Mode Transistor Action; Depletion Mode Transistor Action; nMOS Fabrication; CMOS Fabrication; Thermal Aspects of Processing; BiCMOS Technology; Production of E-beam masks.

I (1.1 to 1.10)

UNIT II

BASIC ELECTRICAL PROPERTIES OF MOS AND BICMOS CIRCUITS 08 hrs

Drain-to-source current I_dsversus Voltage V_dsRelationships; Aspects of MOS Transistor Threshold Voltage V_t; MOS Transistor Transconductance g_m and Output Conductance g_ds; The Pass Transistor; The nMOS Inverter; Determination of Pull-up to Pull-down Ratio for an nMOS Inverter Driven by Another nMOS Inverter; Pull-up to Pull-down Ratio for an nMOS Inverter driven through One or More Pass Transistors; Alternative Forms of Pull-up; The CMOS Inverter; MOS Transistor Circuit Model; Some Characteristics of npn Bipolar Transistors; Latch-up in CMOS Circuits; BiCMOS Latch-up Susceptibility.

I (2.1 to 2.14)

UNIT III

MOS AND BICMOS CIRCUIT DESIGN PROCESSES 07 hrs

MOS Layer; Stick Diagrams; Design Rules and Layout; General Observations on the Design Rules; 2mm Double Metal, Double Poly. CMOS/BiCMOS Rules; 1.2mm Double Metal, Single Poly. CMOS Rules; Layout Diagrams-A Brief Introduction; Symbolic Diagrams-Translation to Mask Form.

I (3.1 to 3.8)

UNIT IV

BASIC CIRCUIT CONCEPTS 07 hrs

Sheet Resistance R_s; Sheet Resistance Concept Applied to MOS Transistors and Inverters; Area Capacitances of Layers; Standard Unit of Capacitance C_g; Some Area Capacitance Calculations; The Delay Unit t; Inverter Delays; Driving Large Capacitive Loads; Propagation Delays; Wiring Capacitances; Choice of Layers.

I (4.1 to 4.11)

UNIT V

SCALING OF MOS CIRCUITS 03 hrs

Scaling Models and Scaling Factors; Scaling Factors for Device Parameters; Some Discussion on Scaling and Limitations of Scaling.

I (5.1 to 5.3)

SUBSYSTEM DESIGN AND LAYOUT 05 hrs

Some Architectural Issues; Switch Logic; Gate (Restoring) Logic; Examples of Structured Design (Combinational Logic).

I (6.1 to 6.4)

UNIT VI

SUBSYSTEM DESIGN PROCESSES 04 hrs

Some General Considerations; An Illustration OF Design Processes.

I (7.1 to 7.2)

ILLUSTRATION OF THE DESIGN PROCESS – COMPUTATIONAL ELEMENTS 04 hrs

Some Observations on the Design Process; Regularity; Design of an ALU Subsystem; A Further Consideration of Adders.

I (8.1 to 8.4)

UNIT VII

MEMORY, REGISTERS AND ASPECTS OF SYSTEM TIMING 04 hrs

System Timing Considerations; Some Commonly Used Storage/Memory Elements.

I (9.1, 9.2)

PRACTICAL ASPECTS AND TESTABILITY 03 hrs

Some Thoughts on Performance; Further Thoughts on Floor Plans/Layout; Floor Plan Layout of the 4-bit Processor; Input/Output (I/O) Pads; ‘Real Estate’; Further Thoughts on System Delays; Ground Rules for Successful Design.

I (10.1 to 10.7)

UNIT VIII

PRACTICAL ASPECTS AND TESTABILITY (Continued) 08 hrs

Real World of VLSI Design; Design Styles and Philosophy; The Interface with the Fabrication House; CAD Tools for Design and Simulation; Aspects of Design Tools; Test and Testability.

I (10.8 to 10.13)

Text Book:

I Basic VLSI Design, Douglas A. Pucknell and Kamran Eshraghian, PHI, 3^rd Edition, 2007.

Reference Book:

1 CMOS VLSI Design, A Circuits and System Perspective, Neil H. E. Weste, David Harris and Ayan Banerjee, Pearson Education 3^rd Edition.

Note: Students have to answer FIVE full questions out of EIGHT questions to be set from each unit carrying 16 marks.

AE75 OPTOELECTRONICS & COMMUNICATION

UNIT I

OPTICAL FIBERS: STRUCTURES, WAVEGUIDING AND FABRICATION 07 hrs

The Evolution of Fiber Optic Systems; Elements of an Optical Fiber Transmission Link; The Nature of Light; Basic Optical Laws and Definitions; Optical Fiber Modes & Configurations; Single Mode Fibers; Graded Index Fiber Structures; Fiber Materials; Fiber Fabrication; Mechanical Properties of Fibers; Fiber Optic Cables.

I (1.2, 1.3, 2.1, 2.2, 2.3, 2.5, 2.6, 2.7, 2.8, 2.9, 2.10)

UNIT II

SIGNAL DEGRADATION IN OPTICAL FIBERS 07 hrs

Attenuation; Signal Distortion in Optical Waveguides; Pulse Broadening in Graded Index Waveguides; Mode Coupling; Design Optimization of Single Mode Fibers.

I (3.1, 3.2, 3.3, 3.4, 3.5)

UNIT III

OPTICAL SOURCES AND DETECTORS 08 hrs

Topics from Semiconductor Physics; Light Emitting Diodes; LASER Diodes; Physical Principles of Photo diodes; Photo Detector Noise; Detector Response Time.

I (4.1, 4.2, 4.3, 6.1, 6.2, 6.3)

UNIT IV

POWER LAUNCHING AND COUPLING 08 hrs

Source to Fiber Power launching; Lensing Schemes for Coupling Improvement; Fiber to Fiber Joints; LED Coupling to Single Mode Fibers; Fiber Splicing; Optical Fiber Connectors.

I (5.1, 5.2, 5.3, 5.4, 5.5, 5.6)

UNIT V

OPTICAL RECEIVER OPERATION 08 hrs

Fundamental Receiver Operation; Digital Receiver Performance; Performance Calculations; Pre-Amplifier Types; Analog Receiver.

I (7.1, 7.2, 7.3, 7.4, 7.5)

UNIT VI

ANALOG SYSTEMS 07 hrs

Overview of Analog Links; Carrier to Noise Ratio; Multi-Channel Transmission Techniques.

I (9.1, 9.2, 9.3)

UNIT VII

DIGITAL TRANSMISSION SYSTEMS 08 hrs

Point-to-Point Links; Line Coding; Error Correction.

I (8.1, 8.2, 8.3)

UNIT VIII

ADVANCED SYSTEMS AND TECHNIQUES 07 hrs

Operational Principles of WDM; Passive Components; Basic Applications and Types of Optical amplifiers; Semiconductor Optical Amplifier; Basic Networks; SONET / SDH; Optical CDMA; Ultrahigh Capacity Networks.

I (10.1, 10.2, 11.1, 11.2, 12.1, 12.2, 12.8, 12.9)

Text Book:

I Optical Fiber Communications, Gerd Keiser, 3^rd Edition, McGraw Hill Publications, 2000.

Reference Book:

1 Optical Communication Systems, John Gowar, PHI.

Note: Students have to answer FIVE full questions out of EIGHT questions to be set from each unit carrying 16 marks.

AE76 WIRELESS & MOBILE COMMUNICATIONS

UNIT I

INTRODUCTION 04 hrs

History of Cellular Systems; Characteristics of Cellular Systems; Fundamentals of Cellular Systems; Cellular System Infrastructure; Satellite Systems; Network Protocols; Ad Hoc and Sensor Networks; Wireless MANs, LANs and PANs.

I (1.1, 1.2, 1.3, 1.4, 1.5, 1.6, 1.7, 1.8)

PROBABILITY, STATISTICS, AND TRAFFIC THEORIES 03 hrs

Introduction; Basic Probability and Statistics Theories.

I (2.1, 2.2)

UNIT II

MOBILE RADIO PROPAGATION 05 hrs

Introduction; Types of Radio Waves; Propagation Mechanisms; Free-Space Propagation; Land Propagation; Path Loss; Slow Fading; Fast Fading; Doppler Effect; Delay Spread; Intersymbol Interference; Coherence Bandwidth; Cochannel Interference.

I (3.1, 3.2, 3.3, 3.4, 3.5, 3.6, 3.7, 3.8, 3.9, 3.10, 3.11, 3.12, 3.13)

CHANNEL CODING AND ERROR CONTROL 03 hrs

Introduction; Linear Block Codes; Cyclic Codes; Cyclic Redundancy Check; Convolutional Codes; Interleaver; Turbo Codes.

I (4.1, 4.2, 4.3, 4.4, 4.5, 4.6, 4.7)

UNIT III

CELLULAR CONCEPT 04 hrs

Introduction; Cell Area; Signal Strength and Cell Parameters; Capacity of a Cell; Frequency Reuse; How to form a Cluster?; Cochannel Interference; Cell Splitting; Cell Sectoring.

I (5.1, 5.2, 5.3, 5.4, 5.5, 5.6, 5.7, 5.8, 5.9)

MULTIPLE RADIO ACCESS 03 hrs

Introduction; Multiple Radio Access Protocols; Contention-Based Protocols.

I (6.1, 6.2, 6.3)

UNIT IV

MULTIPLE DIVISION TECHNIQUES 04 hrs

Introduction; Concepts and Models for Multiple Divisions; Modulation Techniques.

I (7.1, 7.2, 7.3)

CHANNEL ALLOCATION 03 hrs

Introduction; Static Allocation versus Dynamic Allocation; Fixed Channel Allocation (FCA); Dynamic Channel Allocation (DCA); Allocation in Specialized System Structure.

I (8.1, 8.2, 8.3, 8.4, 8.6)

UNIT V

SATELLITE SYSTEMS 04 hrs

Introduction; Types of Satellite Systems; Characteristics of Satellite Systems; Satellite System Infrastructure; Call Setup; Global Positioning System; A-GPS and E-911.

I (11.1, 11.2, 11.3, 11.4, 11.5, 11.6, 11.7)

MOBILE COMMUNICATION SYSTEMS 04 hrs

Introduction; Cellular System Infrastructure; Registration; Handoff Parameters and Underlying Support; Roaming Support; Multicasting.

I (9.1, 9.2, 9.3, 9.4, 9.5, 9.6)

UNIT VI

EXISTING WIRELESS SYSTEMS 08 hrs

Introduction; AMPS; IS-41; GSM; PCS; IS-95; IMT-2000.

I (10.1, 10.2, 10.3, 10.4, 10.5, 10.6, 10.7)

UNIT VII

AD HOC AND SENSOR NETWORKS 07 hrs

Introduction; Characteristics of MANETs; Applications; Routing; Table-Driven Routing Protocols; Source-Initiated On-Demand Routing; Wireless Sensor Networks; Fixed Wireless Sensor Networks.

I (13.1, 13.2, 13.3, 13.4, 13.5, 13.6, 13.8, 13.9)

UNIT VIII

WIRELESS MANs, LANs AND PANs 06 hrs

Introduction; Wireless Metropolitan Area Networks (WMANs); Wireless Local Area Networks (WLANs); Wireless Personal Area Networks (WPANs).

I (14.1, 14.2, 14.3, 14.4)

RECENT ADVANCES 02 hrs

Introduction; Ultra-Wideband Technology; Directional and Smart Antennas; Threats and Security Issues.

I (15.1, 15.2, 15.8, 15.13)

Text Book:

I Introduction to Wireless and Mobile Systems, Second Edition (2007), Dharma Prakash Agrawal and Qing-An Zeng, Thomson India Edition.

Reference Books:

1 Wireless Communications-Principles and Practice, Second Edition (2007), Theodore S. Rappaport, Prentice Hall of India Pvt Ltd.

2 Modern Wireless Communications (2007), Simon Haykin and Michael Moher, Pearson Education, Low Price Edition.

Note: Students have to answer FIVE full questions out of EIGHT questions to be set from each unit carrying 16 marks.

AE77 DIGITAL SIGNAL PROCESSING

UNIT I

SAMPLING OF CONTINUOUS-TIME SIGNALS 07 hrs

Periodic Sampling; Frequency Domain Representation of Sampling; Reconstruction of a Bandlimited Signal from its Samples; Discrete-Time Processing of Continuous-Time Signals; Continuous-Time Processing of Discrete-Time Signals; Digital Processing of Analog Signals; Oversampling and Noise Shaping in A/D and D/A Conversion

I (4.0, 4.1, 4.2, 4.3, 4.4, 4.5, 4.8, 4.9)

UNIT II

TRANSFORM ANALYSIS OF LINEAR TIME-INVARIANT SYSTEMS 07 hrs

The Frequency Response of LTI systems; System Functions for Systems Characterized by Linear Constant-Coefficient Difference Equations; Frequency Response for Rational System Functions; Relationship between Magnitude and Phase; All Pass Systems; Minimum Phase Systems

I (5.0, 5.1, 5.2, 5.3, 5.4, 5.5, 5.6)

UNIT III

STRUCTURES FOR DISCRETE-TIME SYSTEMS 07 hrs

Block Diagram Representation of Linear Constant Coefficient Difference Equations; Signal Flow Graph Representation of Linear Constant Coefficient Difference Equations; Basic Structures for IIR Systems; Transposed Forms; Basic Network Structures for FIR Systems

I (6.0, 6.1, 6.2, 6.3, 6.4, 6.5)

UNIT IV

FILTER DESIGN TECHNIQUES 08 hrs

Design of Discrete-Time IIR Filters from Continuous-Time Filters; Design of FIR Filters by Windowing; FIR Filter Design by the Kaiser Window Method; Optimum Approximations of FIR Filters; FIR Equiripple Approximation; IIR and FIR Discrete-Time Filters

I (7.0, 7.1, 7.2, 7.3, 7.4, 7.5, 7.6)

UNIT V

THE DISCRETE FOURIER TRANSFORM 08 hrs

Sampling the Fourier Transform; Fourier Representation of Finite-Duration Sequences: The Discrete Fourier Transform; Properties of the Discrete Fourier Transform; Linear Convolution using the Discrete Fourier Transform

I (8.0, 8.4, 8.5, 8.6, 8.7)

UNIT VI

COMPUTATION OF THE DISCRETE FOURIER TRANSFORM 08 hrs

Efficient Computation of the Discrete Fourier Transform; The Goertzel Algorithm; Decimation-in-Time FFT Algorithms; Decimation-in-Frequency FFT Algorithms; Practical Considerations; Implementation of the DFT using Convolution

I (9.0, 9.1, 9.2, 9.3, 9.4, 9.5, 9.6)

UNIT VII

FOURIER ANALYSIS OF SIGNALS USING THE DISCRETE FOURIER TRANSFORM 08 hrs

Fourier Analysis of Signals using the DFT; DFT Analysis of Sinusoidal Signals; The Time-Dependent Fourier Transform; Block Convolution using the Time-Dependent Fourier Transform; Fourier Analysis of Nonstationary Signals; Fourier Analysis of Stationary Random Signals: The Periodogram; Spectrum Analysis of Random Signals using Estimates of the Autocorrelation Sequence

I (10.0, 10.1, 10.2, 10.3, 10.4, 10.5, 10.6, 10.7)

UNIT VIII

DISCRETE HILBERT TRANSFORMS 07 hrs

Real and Imaginary Part Sufficiency of the Fourier Transform for Causal Sequences; Relationships between Magnitude and Phase; Hilbert Transform Relations for Complex Sequences.

I (11.0, 11.1, 11.3, 11.4)

Text Book:

I Discrete-Time Signal Processing (1999), Oppenheim, A. V., and Schafer, R. W., with J. II R. Buck, Second Edition, Pearson Education, Low Price Edition.

Reference Books:

1 Digital Signal Processing: Principles, Algorithms, and Applications (2007), Proakis, J. G., Manolakis, D. G., Fourth Edition, PHI Private Limited.

2 Signal Processing First (2003), McClellan, J. H., Schafer, R. W., Yoder, M. A., Prentice Hall.

3 Schaum’s Outline of Digital Signal Processing, Hayes, H., Schaum’s Outlines.

4 Digital Signal Processing – Theory, Analysis and Digital-filter Design, B. Somanathan Nair, PHI Pvt Ltd

Note: Students have to answer FIVE full questions out of EIGHT questions to be set from each unit carrying 16 marks.

AE78 RADAR AND NAVIGATIONAL AIDS

UNIT I

AN INTRODUCTION TO RADAR 07 hrs

Basic Radar; The Simple Form of the Radar Equation; Radar Block Diagram; Radar Frequencies; Applications of Radar; The Origins of Radar.

I (1.1 to 1.6)

UNIT II

THE RADAR EQUATION 08 hrs

Introduction; Detection of Signals in Noise; Receiver Noise and the Signal to Noise Ratio; Probabilities of Detection and False Alarm; Radar Cross Section of Targets; Transmitter Power; Pulse Repetition Frequency; System Losses.

I (2.1 to 2.3, 2.5, 2.7, 2.9, 2.10, 2.12)

UNIT III

MTI AND PULSE DOPPLER RADAR 08 hrs

Introduction to Doppler and MTI Radar; Delay Line Cancellers; Digital MTI Processing; Moving Target Detector; Pulse Doppler Radar.

I (3.1, 3.2, 3.5, 3.6, 3.9)

UNIT IV

DETECTION OF SIGNALS IN NOISE 07 hrs

Introduction; Matched Filter Receiver; Detection Criteria; Detectors; Automatic Detection.

I (5.1 to 5.5)

UNIT V

RADAR CLUTTER 07 hrs

Introduction to Radar Clutter; Surface Clutter to Radar Equation; Land Clutter; Sea Clutter; Weather Clutter.

I (7.1 to 7.4, 7.6)

UNIT VI

THE RADAR ANTENNA 08 hrs

Functions of Radar Antenna; Antenna Parameters; Antenna Radiation Pattern and Illumination; Reflectors Antennas; Reflector Antennas; Electronically Steered Phased Array Antennas.

I (9.1, 9.2, 9.3, 9.4, 9.5)

UNIT VII

RADAR RECEIVER 07 hrs

The Radar Receiver; Receiver Noise Figure; Superheterodyne Receiver; Duplexers and Receiver Protectors; Radar Displays.

I (11.1 to 11.5)

UNIT VIII

TRACKING RADAR 04 hrs

Tracking with Radar, Monopulse Tracking, Conical Scan and Sequential Lobing; Tracking in Range.

I (4.1 to 4.3, 4.6)

NAVIGATIONAL AIDS 04 hrs

Radar Beacons, LORAN, Radio Range, Instrument Landing System, Radio Direction Finding.

II (26.10, 26.11, 26.12, 26.13, 26.14)

Text Books:

I Introduction to Radar Systems, Merrill I. Skolnik, 3e, TMH, 2001

II Electronic and Radio Engineering, F.E. Terman, McGraw Hill Publications.

Reference Book:

1. Introduction to Radar Technology & Applications, Byron Edde, Pearson Education.

Note: Students have to answer FIVE full questions out of EIGHT questions to be set from each unit carrying 16 marks.

AE94 ANALOG & DIGITAL COMMUNICATIONS LAB

List of Experiments

Passive Attenuators: T and π type – Design and study of attenuators for the given attenuation, source and load impedances.

1^st Order Active Filters: Low pass, High pass and Notch Filters – Design for a given cutoff frequency, passband gain and to obtain frequency response curve.

Class C Tuned Amplifier: Design for a particular tuned frequency, plot of Efficiency Vs Load and to obtain optimum load.

Collector Amplitude Modulation: Display of AM output, calculation of modulation index.

AM Detector using Envelope Detector: To study the variation of output signal amplitude and AVC output with variations in AF input.

DSBSC generation using Diodes: Study of output waveforms for variations in the input.

FM Modulation: Study and display of waveforms.

FM Detection: Study and display of waveforms.

PAM: Generation and demodulation – Observe input and output waveforms.

PWM: Generation for the given analog frequency and study of PWM output.

OPAMP preemphasis and deemphasis: Design for a given time constant and plot of Gain Vs Frequency.

Transistor Mixer: Demonstration of mixing action of RF and oscillator frequency to produce IF. To obtain conversion trans-conductance of the mixer.

Verification of sampling theorem using natural / flat top sampling.

Generation and Detection of ASK: Study and display of waveforms.

Generation and Detection of PSK: Study and display of waveforms.

TDM: Study of TDM and recovery of two band limited signals.

Demonstration Experiments

Study of optical fiber characteristics.

Study of DPSK and QPSK.

Use of microwave bench.

Antenna Measurements.

Note: Minimum of 14 experiments to be conducted.

AE69 PROJECT WORK

The Project will consist of hardware/software, design/development, experimental/ theoretical work or a critical in-depth literature survey of a contemporary topic or a combination of these. A student is expected to put in about six hours/week spread over a period of three to four months. There will be no joint project work.

The students may work for their project in any industry, in any educational institution, in R&D Labroratory or in a library depending upon the nature of the project. The student will be required to have a supervisor from one of these places who can supervise and guide the project work. In case of difficulties, the students may contact the local centre.

On completion of the project, the student will submit two bound copies of the project report to IETE Local Centre as per the dates intimated by the Centre. The project work will be assessed by an Assessment Board. The students will be intimated by the local centers of the venue, date & time for presentation of their project report & appearing before the Assessment Board. The result of the project will be finalized at IETE HQ and declared along with the main IETE examination result. Pass marks for the project will be 5 CGPA. Students not getting 5 CGPA marks will be required to re-register for the project following the usual procedure. The students will have the option of taking up a new project or continue with the earlier project.

AE70 SEMINAR

1. Eligibility :

To become eligible for seminar, the student should have cleared 16 subjects including the labs of Sec A & Sec B with GPA of 5 or more. In addition, the student should have completed three and half years from the date of enrolment.

2. Registration :

Eligible students are required to submit their applications for the registration of seminar to the respective local Centres/Sub-Centres where the examinations are conducted with a brief write up of the topic selected for approval. Seminar topic should be selected from the emerging technologies in ET,CS,IT only. Students who have undergone industrial training may make their presentation of their training report. Applications for the seminar must be submitted at the concerned Centre/ Sub-Centre within one week after declaration of result but not later than 05 April / 05 October.

3. Scrutiny / Approval of Seminar proposals :

The members of Regional Evaluation Board will approve the topic of seminar. The students should make presentation on approved topics only.

4. Seminar Fees :

Each student is required to pay Rs 400/ & US $80 for foreign students as Seminar fee to the respective IETE Centre / Sub-Centre.

5. Examination / Evaluation :

The local Centre / Sub-Centre will fix up a suitable date immediately after the main examination for the conduct of Seminar. The students should make Power Point presentation on the approved topic. In addition, they have to submit a complete report on the Seminar topic presented.

AE99 COMMUNICATION SKILLS AND TECHNICAL WRITING

UNIT I

COMMUNICATION: ITS TYPES AND SIGNIFICANCE 05 hrs

Basic Concepts of Communication; Process of Communication; Types of Formal communication; The Media of Communication; Channels of Communication; Barriers in Communication; How to Overcome Barriers to Communication.

I (1.1, 1.2, 1.3, 1.4, 1.5, 1.6)

UNIT II

GRAMMAR 06 hrs

Synonyms; Antonyms; Words used as different parts of speech; Spotting errors; Concord; Principle of proximity between subject and verb.

I (4.1 to 4.3, 4.6, 4.7, 4.8)

UNIT III

SYNTAX 07 hrs

Sentence Structure; Combination and Transformation of sentences; Verb Patterns in English.

I (5.1 to 5.4)

UNIT IV

READING SKILLS 05 hrs

Purpose and Process of Reading; Reading Tactics; Reading Strategies; Reading Comprehension; Paraphrase; Preparing outlines of paragraph/text.

I (2.1 to 2.3, 2.5, 2.6, 2.10, 2.11)

UNIT V

WRITING SKILLS 07 hrs

Elements of Effective Writing; Job Application, Bio-data, Personal Resume and Curriculum Vitae; Preparing Agenda and Minutes of a Meeting; Back office job for organizing a conference/seminar; Writing Styles; Scientific and Technical Writing; Summary Writing; Writing paragraphs; Writing Essays.

I (3.1 to 3.6, 3.8, 3.9, 3.11)

UNIT VI

LISTENING SKILLS 06 hrs

Process of listening; Hard and Soft Skills; Feedback Skills; Essentials of Good Communications; Types of Listening; Barriers to Listening; Note taking and Note making.

I (8.1 to 8.4, 8.6 to 8.10)

SPEAKING SKILLS

Skills of Effective Speaking; Component of an Effective Talk; Tone of Voice; Accent, Body Language; Timing and Duration of Speech; Audio-Visual Aids in Speech.

I (9.1, 9.2, 9.4 to 9.7)

UNIT VII

TECHNICAL REPORT 06 hrs

Main considerations in writing a good report; Types and Structure of Reports; Collecting Data; Technical Proposals; Visual Aids; General Tips for Writing Reports.

I (12.1 to 12.5, 12.8, 12.9)

UNIT VIII

SELF DEVELOPMENT 06 hrs

Know yourself; Tips for giving an Interview; Body language for Interviews; Group Discussion; Skills of participating in meeting; Attending Calls; Soft Skills & Leadership.

I (10.1 to 10.4, 10.6, Chap 13)

Text Book

I The Functional Aspects of Communication Skills, Prajapati Prasad and Rajendra K.

II Sharma, S. K. Kataria & Sons, New Delhi, Reprint 2007.

Reference Books

1 Business Communication, Sinha K. K, S. Chand, New Delhi.

2 Business Communication, Asha Kaul, Prentice Hall of India.

3 Business Correspondence and Report Writing: A Practical Approach to Business and Technical Communication, Sharma, R.C. and Krishna Mohan, Tata McGraw-Hill.

4. A New Approach to English Grammar for High Schools, Madan Sabina, Spectrum Books, New Delhi.

NOTE: Examination procedure.

Theory - consists of written examination for 70 marks.

Oral Test - consists of an Oral Test to test the Communication Skills which includes an oral presentation on any subject, of the choice of students (e.g. About IETE, General knowledge topics etc). This presentation need not be on technical subject. This test carries 30 marks.

Appendix ‘I’

IETE ACADEMIC AWARDS

IETE has instituted the following academic awards for excellence for AMIETE students to be awarded every year. Awardees are intimated sufficiently in advance and are invited to receive these prestigious awards during students’ session of the Annual Technical Convention of IETE. The award consists of a medal and a citation. Details of awards are given below:

Subramanian Thyagaraja Award for securing the highest percentage with 6.5 CPGA and above marks and completing Part-1 of Section A in one attempt without exemptions.

AMIETE Council Award-I for securing the highest percentage with 6.5 CGPA and above grade and completing Part-II of Section A in one attempt without exemptions.

AMIETE Council Award-II for securing the highest percentage with 6.5 CGPA and above grade and completing Part-I of Section B in one attempt without exemptions.

AMIETE Council Award-III for securing the highest percentage with 6.5 CGPA and above grade and completing Part-II of Section B (except project & seminar) in two attempts without exemptions.

Smt Radhabai Kapre Gold Medal Award for securing the highest percentage with 6.5 CGPA and above grade and completing AMIETE in 4 years without exemptions.

Hari Mohan Memorial Award to a girl student for securing the highest percentage with 9 CGPA in both the mathematics papers of the AMIETE examinations conducted in the very first year of her registration with IETE.

AMIETE – Gopal M Dandekar Memorial Award to a girl student securing the highest percentage with 6.5 CGPA and above grade and completing AMIETE (considering ET, CS & IT streams of current Jun and previous Dec exams together) in four years without any exemptions.

ANNEXURE-I

EXTRACTS OF THE RECOGNITIONS GRANTED TO GRADUATESHIP

EXAMINATION (AMIETE) BY GOVERNMENT OF INDIA

Government of India

Ministry of Scientific Research and Cultural Affairs

(Now Ministry of HRD)

O.M. No. F.18.62.57.T.5 dated 24^th June 1959

Subject : Recognition of Technical and Professional Qualifications

The undersigned is directed to say that the Government of India on the recommendations of the Board of Assessment for Technical and Professional qualifications, have decided that a pass in the *Graduate membership Examination of the **Institution of Telecommunication Engineers (India) be recognized for purposes of recruitment to superior posts and services under the Central Government.

Sd/

D V Narsimhan

Deputy Educational Adviser (Tech,)

* Now renamed as AMIETE

*now known as The Institution of Electronics and Telecommunication Engineers.

RECOGNITION OF TECHNICAL AND PROFESSIONAL QUALIFICATIONS

Government of India

Ministry of Education & Social Walfare

(Department of Education)

O.M. No.F.18.13/73 T2 dated 26^th June 1975.

Addressed to all Ministries, Departments of the Government of India, State Governments.

In continuation of Ministry’s O.M. No 18-94/61-T2, dated 17^th December 1969, this is to inform that on the recommendations of the Board of Assessment for Educational Qualifications, the Government of India decided that a pass in the examinations of Indian Professional bodies/Institutions partly by exemption and partly by examination would continue to be treated as recognized for purposes of recruitment of superior post and services under the Central Government.

Sd/- V. R. REDDY

Deputy Education Advisor (IT)

RECOGNITION OF GRADUATE SHIP EXAMINATION BY UPSC

(Extract of the Press Note regarding the recognition of Technical and Professional Qualification for the purpose of Admission to the IAS etc and other examinations conducted by the Union Public Service Commission for Recruitment to Non-technical Service and posts under the Central Government.)

Vide letter no. F.17/2/76(b) dated 31^st December, 1977, the Union Public Service Commission have decided that professional and technical qualifications such as a pass in Section A and B of the AMIETE Graduate ship Examination of Institution of Electronics and Telecommunication Engineers, etc which are recognized by the Government as equivalent to degree in engineering for purpose of recruitment to superior Services/Pots under the Central Government should also be recognized for purposes of admission to competitive examinations conducted by them for recruitment to non technical services/posts (viz IAS etc Assistant’s Grade and Combined Defense Service Examination) for admission to which a degree of recognized university or equivalent has been prescribed as the basic educational qualification.

RECOGNITION OF AMIETE BY MINISTRY OF RAILWAYS

No. E(NG)/11/90/RR-1/15 New Delhi, dated 05.12.1990.

Subject: Recognition of the Grade IETE Examination (now AMIETE)

The sub matter has been carefully considered by the Railway Board and it has been decided that professional and technical qualifications such as a pass in Section ‘A’ And “B” of AMIETE Graduate ship Examination of the Institution of Electronics and Telecommunication Engineers etc which are recognized by the Government as equivalent to degree in Engineering and for purpose of recruitment of Superior Services/Posts under the Central Government, should also be recognized for purposes of admission to competitive examinations conducted for recruitment to various posts on the Railways for admission to which an Engineering Degree of a Recognized University or equivalent has been prescribed as the basic educational qualification.

Sd/-

P L N Sarma

DEPUTY DIRECTOR ESTABLISHMENT (N)

RAILWAY BOARD, New Delhi

New Delhi, Dated 05.12.1990

ELIGIBILITY OF AMIETE FOR APPEARING IN GATE

The relevant extractfrom the GATE information brochure for eligibility of AMIETE for appearing in GATE (Graduate Aptitude Test in Engineering) which is the qualifying examination for admission to Master’s degree course in Engineering and Technology conducted by the IIT’s and the Indian Institute of Science is given below.

‘Those who have complete AMIETE or any other equivalent examinations recognized by the Union Public Service Commission for the purpose of employment are eligible to appear for this stream.”

In 1994 GATE authorities have declared that AMIETE students who complete Section A can also appear for the GATE examination from 1995.

ASSOCIATION OF INDIAN UNIVERSITIES

Letter from the Association of Indian Universities, New Delhi

No EV/II (515)/93/42311, June 10, 1993

The Secretary General

The Institution of Electronics and

Telecommunication Engineers

2, Institutional Area, Lodi Road,

New Delhi-110 003.

Subject: Recognition of AMIETE

Dear Sir,

We thankfully acknowledge your letter No IETE/38/93 dated April 19,1993 addressed to our Secretary General.

We are happy to know that IETE the country’s premier professional body devoted to progress in Electronics and Telecommunication Engineering have conducted three examination of “C” Level (M. Tech Level) in Computer Science which carries the accreditation of the Ministry of Human Resource Development, Govt of India. We are also aware that AMIETE conducted by the Institution is already recognized by the Govt of India and is accepted by national level GATE. As IETE Examinations are recognized by Govt of India, we do not foresee any difficulty in acceptance of the Institution at Indian Universities, on merits of admission to higher courses.

We should be glad to write to any university in case of any difficulty of IETE graduates.

Thank you,

Yours faithfully,

Sd/

K.C. Kalra

Deputy Secretary

Annexure-II

RECOGNITION BY

STATE GOVERNMENTS/UNIVERSITIES/INSTITUTIONS

The following State Governments/Universities/Institutions have recognized the Graduate-ship Examination AMIETE for the purpose of Recruitment to Superior Services/Posts/Higher Education.

State Governments

1. Govt. of Kerala - Gazette No. 7 dt. 14 February 1978 Part

I General administration (Rules Department)

G O (P) No. 60/78 GAD.

2. Govt. of Karnataka - No. DPA 1388/SR – B/76 Mysore Government

Secretariat.

3 Govt. of Uttar Pradesh - Pravidhik Shiksha Vibhag, Lucknow (UP)

No. 2031 – F/89-18 dt. 01 April 1989. Office Memorandum.

4. Govt. of Haryana - 1297- Edu –II-4E-76/34226 dt. 20.10.1976

5. Govt. of Nepal - Nepal Public Service Commission

letter dated 10.05.1990.

6. Govt. of Madras - G O No. 1970/Education dt. 6.11.1971.

Universities

1. Association of Indian Universities - No. EV/II (515)/93/42311 dt. 10.06.1993

2. Aligarh University - D No. 147 dt. 04.02.1991 Dean, faculty

of Engg., AMU, Aligarh (item No. 4 Minutes Equivalent Committee)

3. Anna University, Madras - Letter No. 26869/AA1/88 dt. 4.02.89

from the Registrar.

4. Andhra University, Waltair - Letter No. LII(3)/19 15/90 dt. 08.07.1992

5. Amaravati University - Gazette Notification No. 46/1992

dt. 14^th May, 1992

6. Banaras Hindu University, Varanasi - No. IT/ACD/GEN/VI – 7/689 dt. 21.09.1994.

7. Bharatidasan University, Tiruchirapali - No. 10656/D2/93 dt. 28.10.1993

8. Bombay University, Mumbai - Letter no. E1/C/8155 dt. 22 November, 1988

from the Registrar.

9. Calcutta University - Resolution No. 319/75 Secy dt. 10.06.1991

10. Cochin University of Science and - University Order No. AC, A3/213559/84

Technology, Cochin dated 05.09.1984.

11. University of Indore - No. ACM-II (195)/79 dt. 11.01.1980

(Now Devi Ahilya Viswavidyalaya)

12. Goa University, Goa - No. GU/1/Recog/Engg/130/94 18259

dt. 09.12.1994

13. Gulbarga University, Gulbarga - Notification No. UOG/ACA/92-93/2569

dt. 17.10.1992

14. Gurunanak Dev University Amritsar - D.O. No. 3688 dt. 11.02.1986

15. HNB Garhwal University - No. UOG/Acad/92/2657 dt. 11.02.1992

16. Hyderabad University - Acad/U2/Recog/3941(1) dt. 23.08.1990

17. Indira Gandhi Nation Open University - No. B.IV/6/(8)/93/1155 dt. 6.06.1993.

18. Kakatiya University Warangal (AP) - No. 868/81/1985 dt. 26.07.1985.

19. Kerala University, Trivandrum - No. Acad. AIII/3/3 300/94 dt. 12.08.1994

20. Kurukshetra University Kurukshetra - No. ACM.II/267/92/32413 dt. 26.12.1992

21. Kuvempu University - No. KU/AC/BOS-I/2929/93-94

dt. 28/29.07/1993.

22. University of Madras - No. CR III/Recog/2029 dt. 23^rd March 1978

23. Mother Teresa Women’s University, - No. 2/EC/WU/R/1992. Dt 18.11.92

Chennai (Resolution No. 1992-113)

24. Mysore University - No. AC5/R5/407/87-88 dt. 28.05.91

25. Maharshi Dayanand University Rohtak - Resolution. No. 50 of 25.09.1989

26. Marathwada University - Ex/EQUI-Misc-41/89-90/50660-92 dt 18.09.1989.

27. Nagpur University - Exam/Recog/4276 dt. 05.09.1984

28. Pondicherry University - No. PU/Aca-2/3/5681 dt. 26.02.1993

29. Punjab University - No. 2724/GM dt. 03.12.1991 ST 996

dt18.02.1986

30. Rani Durgavati Viswa Vidyalaya, Jabalpur - Notifications No. GS/89/66

31. University of Roorkee (Now IIT, Roorkee) - No. Acd/1160/R-122 (Recog.)

dt. 10.06.92

32. Sardar Patel University - DB/38 dt. 25.04.1994.

33. Shivaji University, Kolhapur - Letter No. SU/Eligi/340 dt. 30 May 1989

34. Tribhuvan University Kathmandu, Nepal - Letter No. 107/041 dt. 31^st July 1984.

35. Sri Venkateswara (Tirupati) University - Letter No. 27-826-C 1 (2)/89

dt. 16.11.1989.

36. Visva Bharati - No. G/D 43/163 dt. 13.11.1992

37. Bharathiar University, Coimbatore - No. 1603/B/2/95/Recog. Dt. 18.09.1995

38. Bangalore University - No. ACA-I/R2/Prof. Course/ AMIETE/96-97

dt 28.01.1997.

39. Sambalpur University - Notification No. 10420/Acad I

dt. 10.07.1978.

40. Bengal Engg. College, Howrah - Notification – Admission to Post Graduate

(Deemed University) Programme 1999-2000.

41. GGS Indraprastha University, Delhi - No. F IPV-3/10(1)/99/6246 dt 23/24-10-2000.

42. University of Jammu - Letter No. F Acad/V/122/2001/8548-49 dt

43. Gujarat University - No. Exam / 3A / Eli / 6370 / 2002 dt. 12.09.2002.

44. UP Technical University, Lucknow - No. U.P.T.U./ K.S.K./ 2003 / 1815 dt. 22.05.2003.

10.03.2001.

Institutions

1. Indian Institute of Science, Bangalore - As per IISC advertisement.

2. Indian Institute of Technology Delhi - BPGS/75/96/207 and Item No. 2 of the

minutes of 38^th Senate meeting at 18.10.1975.

3. Indian Institute of Technology, Chennai - Letter No. F /Acad/ACU/M2/86/658 dt.

17.06.1986.

4. Indian Institute of Technology, Mumbai - D-III/1-9/94/523 dt 21.07.1994.

5. Indian School of Mines, Dhanbad - Letter No. 29.6/2/AC/84 dt. 14.06.1984

6. Thapar Instt. of Engg & Tech., Patiala - Letter No. EE/702/32 dt. 02 February 1990.

7. Institution of Engineers (I) - Letter No. EEA/AD/7 dt 29.04.1998.

ANNEXURE-III

EXTRACTS OF THE RECOGNITION OF MINISTRY OF SCIENCE & TECHNOLOGY

ABOUT THE INSTITUTION

INTRODUCTION

Membership

Objectives

Examinations

Facilities for Students

Recognition

INTRODUCTION

Bye law 15-Student (DipIETE )Member

MINIMUM PERIOD OF MEMBERSHIP

EXEMPTIONS

EXAMINATION APPLICATION

EXAMINATION FEE

LAST DATE FOR RECEIPT OF EXAMINATION APPLICATION

DATE SHEET

ADMIT CARD

EXAMINATION CENTRES

RESULTS

IMPROVEMENT OF GRADES

Correspondence with IETE HQ

Appendix ‘B’

AE51 ENGINEERING MATHEMATICS – I

AE53 ELECTRONIC DEVICES AND CIRCUITS

AE56 ENGINEERING MATHEMATICS – II

AE72 MICROWAVE THEORY & TECHNIQUES

AE78 RADAR AND NAVIGATIONAL AIDS

AC56 ENGINEERING MATHEMATICS – II

AC64 DESIGN & ANALYSIS OF ALGORITHMS

AT53 ELECTRONIC DEVICES AND CIRCUITS

AT56 ENGINEERING MATHEMATICS – II

PART A: C PROGRAMMING

AE59 CIRCUIT THEORY AND DESIGN

NETWORK EQUATIONS 05 hrs

II (2.2, 8.1, 8.3, 8.4, 8.5)

UNIT III

THE LAPLACE TRANSFORMATION 04 hrs

IMPENDANCE FUNCTIONS AND NETWORK THEOREMS 07 hrs

UNIT VI

TWO-PORT PARAMETERS 07 hrs

UNIT VII

UNIT VIII

ELEMENTS OF TRANSFER FUNCTION SYNTHESIS 04 hrs

Text Books:

UNIT I

UNIT II

UNIT III

UNIT IV

UNIT V

UNIT VI

INTEL 8259A- PROGRAMMABLE INTERRUPT CONTROLLER 08 hrs

UNIT VII

UNIT VIII

Appendix ‘I’

IETE ACADEMIC AWARDS

State Governments

Universities

Institutions